| /linux-6.12.1/drivers/gpu/drm/xe/ |
| D | Makefile | 148 -I$(src)/display/ext \
150 -I$(srctree)/drivers/gpu/drm/i915/display/ \
160 $(obj)/i915-display/%.o: $(srctree)/drivers/gpu/drm/i915/display/%.c FORCE
166 display/ext/i915_irq.o \
167 display/ext/i915_utils.o \
168 display/intel_fb_bo.o \
169 display/intel_fbdev_fb.o \
170 display/xe_display.o \
171 display/xe_display_misc.o \
172 display/xe_display_rps.o \
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| /linux-6.12.1/drivers/gpu/drm/i915/ |
| D | Makefile | 220 display/hsw_ips.o \
221 display/i9xx_plane.o \
222 display/i9xx_wm.o \
223 display/intel_alpm.o \
224 display/intel_atomic.o \
225 display/intel_atomic_plane.o \
226 display/intel_audio.o \
227 display/intel_bios.o \
228 display/intel_bw.o \
229 display/intel_cdclk.o \
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| /linux-6.12.1/drivers/gpu/drm/i915/display/ |
| D | vlv_dsi_regs.h | 14 #define _MIPI_MMIO_BASE(display) ((display)->dsi.mmio_base) argument
97 #define MIPI_DEVICE_READY(display, port) _MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_DEVICE_R… argument
107 #define MIPI_INTR_STAT(display, port) _MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_INTR_STAT,… argument
110 #define MIPI_INTR_EN(display, port) _MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_INTR_EN, _MI… argument
146 #define MIPI_DSI_FUNC_PRG(display, port) _MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_DSI_FUNC… argument
169 #define MIPI_HS_TX_TIMEOUT(display, port) _MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_HS_TX_T… argument
174 #define MIPI_LP_RX_TIMEOUT(display, port) _MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_LP_RX_T… argument
179 #define MIPI_TURN_AROUND_TIMEOUT(display, port) _MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_T… argument
184 #define MIPI_DEVICE_RESET_TIMER(display, port) _MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_DE… argument
189 #define MIPI_DPI_RESOLUTION(display, port) _MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_DPI_RE… argument
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| D | intel_de.h | 13 static inline struct intel_uncore *__to_uncore(struct intel_display *display) in __to_uncore() argument
15 return &to_i915(display->drm)->uncore; in __to_uncore()
19 __intel_de_read(struct intel_display *display, i915_reg_t reg) in __intel_de_read() argument
23 intel_dmc_wl_get(display, reg); in __intel_de_read()
25 val = intel_uncore_read(__to_uncore(display), reg); in __intel_de_read()
27 intel_dmc_wl_put(display, reg); in __intel_de_read()
34 __intel_de_read8(struct intel_display *display, i915_reg_t reg) in __intel_de_read8() argument
38 intel_dmc_wl_get(display, reg); in __intel_de_read8()
40 val = intel_uncore_read8(__to_uncore(display), reg); in __intel_de_read8()
42 intel_dmc_wl_put(display, reg); in __intel_de_read8()
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| D | intel_psr.c | 227 struct intel_display *display = to_intel_display(intel_dp); in psr_global_enabled() local
232 if (display->params.enable_psr == -1) in psr_global_enabled()
234 return display->params.enable_psr; in psr_global_enabled()
244 struct intel_display *display = to_intel_display(intel_dp); in psr2_global_enabled() local
251 if (display->params.enable_psr == 1) in psr2_global_enabled()
259 struct intel_display *display = to_intel_display(intel_dp); in psr2_su_region_et_global_enabled() local
261 if (display->params.enable_psr != -1) in psr2_su_region_et_global_enabled()
269 struct intel_display *display = to_intel_display(intel_dp); in panel_replay_global_enabled() local
271 if ((display->params.enable_psr != -1) || in panel_replay_global_enabled()
279 struct intel_display *display = to_intel_display(intel_dp); in psr_irq_psr_error_bit_get() local
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| D | intel_pps.c | 21 static void vlv_steal_power_sequencer(struct intel_display *display,
29 struct intel_display *display = to_intel_display(intel_dp); in pps_name() local
30 struct drm_i915_private *i915 = to_i915(display->drm); in pps_name()
66 struct intel_display *display = to_intel_display(intel_dp); in intel_pps_lock() local
67 struct drm_i915_private *dev_priv = to_i915(display->drm); in intel_pps_lock()
74 mutex_lock(&display->pps.mutex); in intel_pps_lock()
82 struct intel_display *display = to_intel_display(intel_dp); in intel_pps_unlock() local
83 struct drm_i915_private *dev_priv = to_i915(display->drm); in intel_pps_unlock()
85 mutex_unlock(&display->pps.mutex); in intel_pps_unlock()
94 struct intel_display *display = to_intel_display(intel_dp); in vlv_power_sequencer_kick() local
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| D | intel_vrr.c | 20 struct intel_display *display = to_intel_display(connector); in intel_vrr_is_capable() local
46 return HAS_VRR(display) && in intel_vrr_is_capable()
92 struct intel_display *display = to_intel_display(crtc_state); in intel_vrr_vblank_exit_length() local
94 if (DISPLAY_VER(display) >= 13) in intel_vrr_vblank_exit_length()
115 struct intel_display *display = to_intel_display(crtc_state); in is_cmrr_frac_required() local
119 if (!HAS_CMRR(display)) in is_cmrr_frac_required()
163 struct intel_display *display = to_intel_display(crtc_state); in intel_vrr_compute_config() local
187 if (HAS_LRR(display)) in intel_vrr_compute_config()
247 if (DISPLAY_VER(display) >= 13) { in intel_vrr_compute_config()
259 struct intel_display *display = to_intel_display(crtc_state); in trans_vrr_ctl() local
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| D | intel_opregion.c | 255 struct intel_display *display; member
271 static int check_swsci_function(struct intel_display *display, u32 function) in check_swsci_function() argument
273 struct intel_opregion *opregion = display->opregion; in check_swsci_function()
303 static int swsci(struct intel_display *display, in swsci() argument
307 struct pci_dev *pdev = to_pci_dev(display->drm->dev); in swsci()
312 ret = check_swsci_function(display, function); in swsci()
316 swsci = display->opregion->swsci; in swsci()
334 drm_dbg(display->drm, "SWSCI request already in progress\n"); in swsci()
358 drm_dbg(display->drm, "SWSCI request timed out\n"); in swsci()
367 drm_dbg(display->drm, "SWSCI request error %u\n", scic); in swsci()
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| D | vlv_dsi.c | 88 struct intel_display *display = to_intel_display(&intel_dsi->base); in vlv_dsi_wait_for_fifo_empty() local
94 if (intel_de_wait_for_set(display, MIPI_GEN_FIFO_STAT(display, port), in vlv_dsi_wait_for_fifo_empty()
96 drm_err(display->drm, "DPI FIFOs are not empty\n"); in vlv_dsi_wait_for_fifo_empty()
99 static void write_data(struct intel_display *display, in write_data() argument
111 intel_de_write(display, reg, val); in write_data()
115 static void read_data(struct intel_display *display, in read_data() argument
122 u32 val = intel_de_read(display, reg); in read_data()
134 struct intel_display *display = to_intel_display(&intel_dsi->base); in intel_dsi_host_transfer() local
149 data_reg = MIPI_LP_GEN_DATA(display, port); in intel_dsi_host_transfer()
151 ctrl_reg = MIPI_LP_GEN_CTRL(display, port); in intel_dsi_host_transfer()
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| D | intel_opregion.h | 37 int intel_opregion_setup(struct intel_display *display);
38 void intel_opregion_cleanup(struct intel_display *display);
40 void intel_opregion_register(struct intel_display *display);
41 void intel_opregion_unregister(struct intel_display *display);
43 void intel_opregion_resume(struct intel_display *display);
44 void intel_opregion_suspend(struct intel_display *display,
47 bool intel_opregion_asle_present(struct intel_display *display);
48 void intel_opregion_asle_intr(struct intel_display *display);
51 int intel_opregion_notify_adapter(struct intel_display *display,
53 int intel_opregion_get_panel_type(struct intel_display *display);
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| D | intel_fbc.c | 93 struct intel_display *display; member
157 static unsigned int skl_fbc_min_cfb_stride(struct intel_display *display, in skl_fbc_min_cfb_stride() argument
171 if (DISPLAY_VER(display) >= 11) in skl_fbc_min_cfb_stride()
185 static unsigned int _intel_fbc_cfb_stride(struct intel_display *display, in _intel_fbc_cfb_stride() argument
194 if (DISPLAY_VER(display) >= 9) in _intel_fbc_cfb_stride()
195 return max(ALIGN(stride, 512), skl_fbc_min_cfb_stride(display, cpp, width)); in _intel_fbc_cfb_stride()
202 struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev); in intel_fbc_cfb_stride() local
207 return _intel_fbc_cfb_stride(display, cpp, width, stride); in intel_fbc_cfb_stride()
215 static unsigned int intel_fbc_max_cfb_height(struct intel_display *display) in intel_fbc_max_cfb_height() argument
217 struct drm_i915_private *i915 = to_i915(display->drm); in intel_fbc_max_cfb_height()
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| D | intel_bios.c | 69 struct intel_display *display; member
148 bdb_find_section(struct intel_display *display, in bdb_find_section() argument
153 list_for_each_entry(entry, &display->vbt.bdb_blocks, node) { in bdb_find_section()
203 static size_t lfp_data_min_size(struct intel_display *display) in lfp_data_min_size() argument
208 ptrs = bdb_find_section(display, BDB_LFP_DATA_PTRS); in lfp_data_min_size()
363 static void *generate_lfp_data_ptrs(struct intel_display *display, in generate_lfp_data_ptrs() argument
377 if (display->vbt.version < 155) in generate_lfp_data_ptrs()
386 drm_dbg_kms(display->drm, "Generating LFP data table pointers\n"); in generate_lfp_data_ptrs()
454 init_bdb_block(struct intel_display *display, in init_bdb_block() argument
467 temp_block = generate_lfp_data_ptrs(display, bdb); in init_bdb_block()
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| D | intel_dmc_wl.c | 54 static void __intel_dmc_wl_release(struct intel_display *display) in __intel_dmc_wl_release() argument
56 struct drm_i915_private *i915 = to_i915(display->drm); in __intel_dmc_wl_release()
57 struct intel_dmc_wl *wl = &display->wl; in __intel_dmc_wl_release()
69 struct intel_display *display = in intel_dmc_wl_work() local
79 __intel_de_rmw_nowl(display, DMC_WAKELOCK1_CTL, DMC_WAKELOCK_CTL_REQ, 0); in intel_dmc_wl_work()
81 if (__intel_de_wait_for_register_nowl(display, DMC_WAKELOCK1_CTL, in intel_dmc_wl_work()
110 static bool __intel_dmc_wl_supported(struct intel_display *display) in __intel_dmc_wl_supported() argument
112 struct drm_i915_private *i915 = to_i915(display->drm); in __intel_dmc_wl_supported()
114 if (DISPLAY_VER(display) < 20 || in __intel_dmc_wl_supported()
116 !display->params.enable_dmc_wl) in __intel_dmc_wl_supported()
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| D | intel_quirks.c | 12 static void intel_set_quirk(struct intel_display *display, enum intel_quirk_id quirk) in intel_set_quirk() argument
14 display->quirks.mask |= BIT(quirk); in intel_set_quirk()
25 static void quirk_ssc_force_disable(struct intel_display *display) in quirk_ssc_force_disable() argument
27 intel_set_quirk(display, QUIRK_LVDS_SSC_DISABLE); in quirk_ssc_force_disable()
28 drm_info(display->drm, "applying lvds SSC disable quirk\n"); in quirk_ssc_force_disable()
35 static void quirk_invert_brightness(struct intel_display *display) in quirk_invert_brightness() argument
37 intel_set_quirk(display, QUIRK_INVERT_BRIGHTNESS); in quirk_invert_brightness()
38 drm_info(display->drm, "applying inverted panel brightness quirk\n"); in quirk_invert_brightness()
42 static void quirk_backlight_present(struct intel_display *display) in quirk_backlight_present() argument
44 intel_set_quirk(display, QUIRK_BACKLIGHT_PRESENT); in quirk_backlight_present()
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| D | intel_display_driver.c | 90 cdclk_state = to_intel_cdclk_state(i915->display.cdclk.obj.state); in intel_display_driver_init_hw()
93 intel_cdclk_dump_config(i915, &i915->display.cdclk.hw, "Current CDCLK"); in intel_display_driver_init_hw()
94 cdclk_state->logical = cdclk_state->actual = i915->display.cdclk.hw; in intel_display_driver_init_hw()
119 INIT_LIST_HEAD(&i915->display.global.obj_list); in intel_mode_config_init()
186 spin_lock_init(&i915->display.fb_tracking.lock); in intel_display_driver_early_probe()
187 mutex_init(&i915->display.backlight.lock); in intel_display_driver_early_probe()
188 mutex_init(&i915->display.audio.mutex); in intel_display_driver_early_probe()
189 mutex_init(&i915->display.wm.wm_mutex); in intel_display_driver_early_probe()
190 mutex_init(&i915->display.pps.mutex); in intel_display_driver_early_probe()
191 mutex_init(&i915->display.hdcp.hdcp_mutex); in intel_display_driver_early_probe()
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| D | intel_hdmi.c | 66 struct intel_display *display = to_intel_display(intel_hdmi); in assert_hdmi_port_disabled() local
69 enabled_bits = HAS_DDI(display) ? DDI_BUF_CTL_ENABLE : SDVO_ENABLE; in assert_hdmi_port_disabled()
71 drm_WARN(display->drm, in assert_hdmi_port_disabled()
72 intel_de_read(display, intel_hdmi->hdmi_reg) & enabled_bits, in assert_hdmi_port_disabled()
77 assert_hdmi_transcoder_func_disabled(struct intel_display *display, in assert_hdmi_transcoder_func_disabled() argument
80 drm_WARN(display->drm, in assert_hdmi_transcoder_func_disabled()
81 intel_de_read(display, TRANS_DDI_FUNC_CTL(display, cpu_transcoder)) & in assert_hdmi_transcoder_func_disabled()
156 hsw_dip_data_reg(struct intel_display *display, in hsw_dip_data_reg() argument
163 return HSW_TVIDEO_DIP_GMP_DATA(display, cpu_transcoder, i); in hsw_dip_data_reg()
165 return HSW_TVIDEO_DIP_VSC_DATA(display, cpu_transcoder, i); in hsw_dip_data_reg()
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| D | intel_vblank.c | 70 struct intel_display *display = to_intel_display(crtc->dev); in i915_get_vblank_counter() local
106 frame = intel_de_read64_2x32(display, PIPEFRAMEPIXEL(display, pipe), in i915_get_vblank_counter()
107 PIPEFRAME(display, pipe)); in i915_get_vblank_counter()
122 struct intel_display *display = to_intel_display(crtc->dev); in g4x_get_vblank_counter() local
129 return intel_de_read(display, PIPE_FRMCOUNT_G4X(display, pipe)); in g4x_get_vblank_counter()
134 struct intel_display *display = to_intel_display(crtc); in intel_crtc_scanlines_since_frame_timestamp() local
153 scan_prev_time = intel_de_read_fw(display, in intel_crtc_scanlines_since_frame_timestamp()
160 scan_curr_time = intel_de_read_fw(display, IVB_TIMESTAMP_CTR); in intel_crtc_scanlines_since_frame_timestamp()
162 scan_post_time = intel_de_read_fw(display, in intel_crtc_scanlines_since_frame_timestamp()
195 struct intel_display *display = to_intel_display(crtc_state); in intel_crtc_scanline_offset() local
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| D | intel_frontbuffer.c | 86 struct intel_display *display = &i915->display; in frontbuffer_flush() local
89 spin_lock(&i915->display.fb_tracking.lock); in frontbuffer_flush()
90 frontbuffer_bits &= ~i915->display.fb_tracking.busy_bits; in frontbuffer_flush()
91 spin_unlock(&i915->display.fb_tracking.lock); in frontbuffer_flush()
101 intel_psr_flush(display, frontbuffer_bits, origin); in frontbuffer_flush()
120 spin_lock(&i915->display.fb_tracking.lock); in intel_frontbuffer_flip_prepare()
121 i915->display.fb_tracking.flip_bits |= frontbuffer_bits; in intel_frontbuffer_flip_prepare()
123 i915->display.fb_tracking.busy_bits &= ~frontbuffer_bits; in intel_frontbuffer_flip_prepare()
124 spin_unlock(&i915->display.fb_tracking.lock); in intel_frontbuffer_flip_prepare()
140 spin_lock(&i915->display.fb_tracking.lock); in intel_frontbuffer_flip_complete()
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| D | intel_hotplug.c | 148 struct intel_hotplug *hpd = &dev_priv->display.hotplug; in intel_hpd_irq_storm_detect()
156 (!long_hpd && !dev_priv->display.hotplug.hpd_short_storm_enabled)) in intel_hpd_irq_storm_detect()
184 return i915->display.hotplug.detection_work_enabled; in detection_work_enabled()
238 dev_priv->display.hotplug.stats[pin].state != HPD_MARK_DISABLED) in intel_hpd_irq_storm_switch_to_polling()
246 dev_priv->display.hotplug.stats[pin].state = HPD_DISABLED; in intel_hpd_irq_storm_switch_to_polling()
257 &dev_priv->display.hotplug.reenable_work, in intel_hpd_irq_storm_switch_to_polling()
266 display.hotplug.reenable_work.work); in intel_hpd_irq_storm_reenable_work()
280 dev_priv->display.hotplug.stats[pin].state != HPD_DISABLED) in intel_hpd_irq_storm_reenable_work()
292 if (dev_priv->display.hotplug.stats[pin].state == HPD_DISABLED) in intel_hpd_irq_storm_reenable_work()
293 dev_priv->display.hotplug.stats[pin].state = HPD_ENABLED; in intel_hpd_irq_storm_reenable_work()
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| D | intel_lspcon.c | 83 struct intel_display *display = to_intel_display(intel_dp); in lspcon_detect_vendor() local
88 drm_err(display->drm, "Can't read description\n"); in lspcon_detect_vendor()
99 drm_dbg_kms(display->drm, "Vendor: Mega Chips\n"); in lspcon_detect_vendor()
104 drm_dbg_kms(display->drm, "Vendor: Parade Tech\n"); in lspcon_detect_vendor()
108 drm_err(display->drm, "Invalid/Unknown vendor OUI\n"); in lspcon_detect_vendor()
126 struct intel_display *display = to_intel_display(intel_dp); in lspcon_detect_hdr_capability() local
134 drm_dbg_kms(display->drm, "HDR capability detection failed\n"); in lspcon_detect_hdr_capability()
137 drm_dbg_kms(display->drm, "LSPCON capable of HDR\n"); in lspcon_detect_hdr_capability()
145 struct intel_display *display = to_intel_display(intel_dp); in lspcon_get_current_mode() local
150 drm_dbg_kms(display->drm, "Error reading LSPCON mode\n"); in lspcon_get_current_mode()
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| D | intel_hti.c | 12 void intel_hti_init(struct intel_display *display) in intel_hti_init() argument
18 if (DISPLAY_INFO(display)->has_hti) in intel_hti_init()
19 display->hti.state = intel_de_read(display, HDPORT_STATE); in intel_hti_init()
22 bool intel_hti_uses_phy(struct intel_display *display, enum phy phy) in intel_hti_uses_phy() argument
24 if (drm_WARN_ON(display->drm, phy == PHY_NONE)) in intel_hti_uses_phy()
27 return display->hti.state & HDPORT_ENABLED && in intel_hti_uses_phy()
28 display->hti.state & HDPORT_DDI_USED(phy); in intel_hti_uses_phy()
31 u32 intel_hti_dpll_mask(struct intel_display *display) in intel_hti_dpll_mask() argument
33 if (!(display->hti.state & HDPORT_ENABLED)) in intel_hti_dpll_mask()
40 return REG_FIELD_GET(HDPORT_DPLL_USED_MASK, display->hti.state); in intel_hti_dpll_mask()
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| D | intel_wm.c | 47 if (i915->display.funcs.wm->update_wm) in intel_update_watermarks()
48 i915->display.funcs.wm->update_wm(i915); in intel_update_watermarks()
56 if (i915->display.funcs.wm->compute_pipe_wm) in intel_compute_pipe_wm()
57 return i915->display.funcs.wm->compute_pipe_wm(state, crtc); in intel_compute_pipe_wm()
67 if (!i915->display.funcs.wm->compute_intermediate_wm) in intel_compute_intermediate_wm()
70 if (drm_WARN_ON(&i915->drm, !i915->display.funcs.wm->compute_pipe_wm)) in intel_compute_intermediate_wm()
73 return i915->display.funcs.wm->compute_intermediate_wm(state, crtc); in intel_compute_intermediate_wm()
81 if (i915->display.funcs.wm->initial_watermarks) { in intel_initial_watermarks()
82 i915->display.funcs.wm->initial_watermarks(state, crtc); in intel_initial_watermarks()
94 if (i915->display.funcs.wm->atomic_update_watermarks) in intel_atomic_update_watermarks()
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| D | intel_sprite.c | 51 static char sprite_name(struct intel_display *display, enum pipe pipe, int sprite) in sprite_name() argument
53 return pipe * DISPLAY_RUNTIME_INFO(display)->num_sprites[pipe] + sprite + 'A'; in sprite_name()
70 struct intel_display *display = to_intel_display(plane->base.dev); in chv_sprite_update_csc() local
103 intel_de_write_fw(display, SPCSCYGOFF(plane_id), in chv_sprite_update_csc()
105 intel_de_write_fw(display, SPCSCCBOFF(plane_id), in chv_sprite_update_csc()
107 intel_de_write_fw(display, SPCSCCROFF(plane_id), in chv_sprite_update_csc()
110 intel_de_write_fw(display, SPCSCC01(plane_id), in chv_sprite_update_csc()
112 intel_de_write_fw(display, SPCSCC23(plane_id), in chv_sprite_update_csc()
114 intel_de_write_fw(display, SPCSCC45(plane_id), in chv_sprite_update_csc()
116 intel_de_write_fw(display, SPCSCC67(plane_id), in chv_sprite_update_csc()
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| D | g4x_dp.c | 92 struct intel_display *display = to_intel_display(encoder); in intel_dp_prepare() local
122 intel_dp->DP = intel_de_read(display, intel_dp->output_reg) & DP_DETECTED; in intel_dp_prepare()
144 intel_de_rmw(display, TRANS_DP_CTL(crtc->pipe), in intel_dp_prepare()
170 struct intel_display *display = to_intel_display(intel_dp); in assert_dp_port() local
173 bool cur_state = intel_de_read(display, intel_dp->output_reg) & DP_PORT_EN; in assert_dp_port()
184 struct intel_display *display = &dev_priv->display; in assert_edp_pll() local
185 bool cur_state = intel_de_read(display, DP_A) & DP_PLL_ENABLE; in assert_edp_pll()
197 struct intel_display *display = to_intel_display(intel_dp); in ilk_edp_pll_on() local
205 drm_dbg_kms(display->drm, "enabling eDP PLL for clock %d\n", in ilk_edp_pll_on()
215 intel_de_write(display, DP_A, intel_dp->DP); in ilk_edp_pll_on()
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| D | intel_alpm.c | 142 struct intel_display *display = to_intel_display(intel_dp); in _lnl_compute_aux_less_alpm_params() local
161 if (display->params.psr_safest_params) in _lnl_compute_aux_less_alpm_params()
174 struct intel_display *display = to_intel_display(intel_dp); in _lnl_compute_alpm_params() local
177 if (DISPLAY_VER(display) < 20) in _lnl_compute_alpm_params()
190 if (display->params.psr_safest_params) in _lnl_compute_alpm_params()
215 struct intel_display *display = to_intel_display(crtc_state); in io_buffer_wake_time() local
217 if (DISPLAY_VER(display) >= 12) in io_buffer_wake_time()
226 struct intel_display *display = to_intel_display(intel_dp); in intel_alpm_compute_params() local
239 if (DISPLAY_VER(display) >= 20) in intel_alpm_compute_params()
241 else if (DISPLAY_VER(display) >= 12) in intel_alpm_compute_params()
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