Searched refs:dcn3_01_soc (Results 1 – 3 of 3) sorted by relevance
112 struct _vcs_dpi_soc_bounding_box_st dcn3_01_soc = { variable333 memcpy(s, dcn3_01_soc.clock_limits, sizeof(dcn3_01_soc.clock_limits)); in dcn301_fpu_update_bw_bounding_box()338 dcn3_01_soc.num_chans = bw_params->num_channels; in dcn301_fpu_update_bw_bounding_box()343 for (closest_clk_lvl = 0, j = dcn3_01_soc.num_states - 1; j >= 0; j--) { in dcn301_fpu_update_bw_bounding_box()344 if ((unsigned int) dcn3_01_soc.clock_limits[j].dcfclk_mhz <= clk_table->entries[i].dcfclk_mhz) { in dcn301_fpu_update_bw_bounding_box()356 s[i].dispclk_mhz = dcn3_01_soc.clock_limits[closest_clk_lvl].dispclk_mhz; in dcn301_fpu_update_bw_bounding_box()357 s[i].dppclk_mhz = dcn3_01_soc.clock_limits[closest_clk_lvl].dppclk_mhz; in dcn301_fpu_update_bw_bounding_box()359 dcn3_01_soc.clock_limits[closest_clk_lvl].dram_bw_per_chan_gbps; in dcn301_fpu_update_bw_bounding_box()360 s[i].dscclk_mhz = dcn3_01_soc.clock_limits[closest_clk_lvl].dscclk_mhz; in dcn301_fpu_update_bw_bounding_box()361 s[i].dtbclk_mhz = dcn3_01_soc.clock_limits[closest_clk_lvl].dtbclk_mhz; in dcn301_fpu_update_bw_bounding_box()[all …]
36 extern struct _vcs_dpi_soc_bounding_box_st dcn3_01_soc;
1293 struct _vcs_dpi_soc_bounding_box_st *loaded_bb = &dcn3_01_soc; in init_soc_bounding_box()1558 set_wm_ranges(pool->base.pp_smu, &dcn3_01_soc); in dcn301_resource_construct()1569 dml_init_instance(&dc->dml, &dcn3_01_soc, &dcn3_01_ip, DML_PROJECT_DCN30); in dcn301_resource_construct()