| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_mcg/ |
| D | dml2_mcg_dcn4.c | 50 if (soc_bb->clk_table.dcfclk.num_clk_values == 2) { in build_min_clk_table_fine_grained()
58 min_dcfclk_khz = soc_bb->clk_table.dcfclk.clk_values_khz[0]; in build_min_clk_table_fine_grained()
101 …w_table.entries[i].min_dcfclk_khz, soc_bb->clk_table.dcfclk.clk_values_khz, soc_bb->clk_table.dcfc… in build_min_clk_table_fine_grained()
107 if (min_table->dram_bw_table.entries[i].min_dcfclk_khz > min_table->max_clocks_khz.dcfclk || in build_min_clk_table_fine_grained()
139 min_table->dram_bw_table.entries[i].min_dcfclk_khz = soc_bb->clk_table.dcfclk.clk_values_khz[i]; in build_min_clk_table_coarse_grained()
155 if (soc_bb->clk_table.dcfclk.num_clk_values < 2 || soc_bb->clk_table.fclk.num_clk_values < 2) in build_min_clock_table()
161 if (soc_bb->clk_table.dcfclk.num_clk_values == 2) { in build_min_clock_table()
169 if (soc_bb->clk_table.fclk.num_clk_values == soc_bb->clk_table.dcfclk.num_clk_values && in build_min_clock_table()
185 …min_table->max_clocks_khz.dcfclk = soc_bb->clk_table.dcfclk.clk_values_khz[soc_bb->clk_table.dcfcl… in build_min_clock_table()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_dpmm/ |
| D | dml2_dpmm_dcn4.c | 25 double *dcfclk) in get_minimum_clocks_for_latency() argument
34 *dcfclk = in_out->min_clk_table->dram_bw_table.entries[min_clock_index_for_latency].min_dcfclk_khz; in get_minimum_clocks_for_latency()
255 …ult = round_up_to_next_dpm(&display_cfg->min_clocks.dcn4x.active.dcfclk_khz, &state_table->dcfclk); in map_soc_min_clocks_to_dpm_fine_grained()
262 …round_up_to_next_dpm(&display_cfg->min_clocks.dcn4x.svp_prefetch.dcfclk_khz, &state_table->dcfclk); in map_soc_min_clocks_to_dpm_fine_grained()
269 …esult = round_up_to_next_dpm(&display_cfg->min_clocks.dcn4x.idle.dcfclk_khz, &state_table->dcfclk); in map_soc_min_clocks_to_dpm_fine_grained()
285 …if (display_cfg->min_clocks.dcn4x.active.dcfclk_khz <= state_table->dcfclk.clk_values_khz[index] && in map_soc_min_clocks_to_dpm_coarse_grained()
288 display_cfg->min_clocks.dcn4x.active.dcfclk_khz = state_table->dcfclk.clk_values_khz[index]; in map_soc_min_clocks_to_dpm_coarse_grained()
299 if (display_cfg->min_clocks.dcn4x.idle.dcfclk_khz <= state_table->dcfclk.clk_values_khz[index] && in map_soc_min_clocks_to_dpm_coarse_grained()
302 display_cfg->min_clocks.dcn4x.idle.dcfclk_khz = state_table->dcfclk.clk_values_khz[index]; in map_soc_min_clocks_to_dpm_coarse_grained()
328 if (state_table->dcfclk.num_clk_values == 2) { in map_min_clocks_to_dpm()
[all …]
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| D | dcn31_fpu.c | 489 double dcfclk = context->bw_ctx.dml.vba.DCFCLKState[vlevel][context->bw_ctx.dml.vba.maxMpcComb]; in dcn31_calculate_wm_and_dlg_fp() local
494 if (context->bw_ctx.dml.soc.min_dcfclk > dcfclk) in dcn31_calculate_wm_and_dlg_fp()
495 dcfclk = context->bw_ctx.dml.soc.min_dcfclk; in dcn31_calculate_wm_and_dlg_fp()
502 context->bw_ctx.bw.dcn.clk.dcfclk_khz = dcfclk; // always should be vlevel 0 in dcn31_calculate_wm_and_dlg_fp()
507 pipes[0].clks_cfg.dcfclk_mhz = dcfclk; in dcn31_calculate_wm_and_dlg_fp()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| D | dcn30_fpu.c | 387 double dcfclk = context->bw_ctx.dml.vba.DCFCLKState[vlevel][maxMpcComb]; in dcn30_fpu_calculate_wm_and_dlg() local
420 dcfclk = context->bw_ctx.dml.vba.DCFCLKState[vlevel][context->bw_ctx.dml.vba.maxMpcComb]; in dcn30_fpu_calculate_wm_and_dlg()
425 if (context->bw_ctx.dml.soc.min_dcfclk > dcfclk) in dcn30_fpu_calculate_wm_and_dlg()
426 dcfclk = context->bw_ctx.dml.soc.min_dcfclk; in dcn30_fpu_calculate_wm_and_dlg()
429 pipes[0].clks_cfg.dcfclk_mhz = dcfclk; in dcn30_fpu_calculate_wm_and_dlg()
455 pipes[0].clks_cfg.dcfclk_mhz = dcfclk; in dcn30_fpu_calculate_wm_and_dlg()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/ |
| D | dml21_translation_helper.c | 108 dml_clk_table->dcfclk.num_clk_values = dc_clk_table->num_entries_per_clk.num_dcfclk_levels; in dml21_apply_soc_bb_overrides()
110 if (i < dml_clk_table->dcfclk.num_clk_values) { in dml21_apply_soc_bb_overrides()
114 dml_clk_table->dcfclk.clk_values_khz[i] = dc_bw_params->dc_mode_limit.dcfclk_mhz * 1000; in dml21_apply_soc_bb_overrides()
115 dml_clk_table->dcfclk.num_clk_values = i + 1; in dml21_apply_soc_bb_overrides()
117 dml_clk_table->dcfclk.clk_values_khz[i] = 0; in dml21_apply_soc_bb_overrides()
118 dml_clk_table->dcfclk.num_clk_values = i; in dml21_apply_soc_bb_overrides()
121 dml_clk_table->dcfclk.clk_values_khz[i] = dc_clk_table->entries[i].dcfclk_mhz * 1000; in dml21_apply_soc_bb_overrides()
124 dml_clk_table->dcfclk.clk_values_khz[i] = 0; in dml21_apply_soc_bb_overrides()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/ |
| D | dml_top_soc_parameter_types.h | 118 struct dml2_clk_table dcfclk; member
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/bounding_boxes/ |
| D | dcn4_soc_bb.h | 94 .dcfclk = {
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| D | dcn3_soc_bb.h | 144 .dcfclk = {
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| D | clk_mgr.h | 173 uint32_t dcfclk; member
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| D | dcn_calc_auto.c | 1006 v->dcfclk = v->dcfclk_per_state[v->voltage_level]; in mode_support_and_system_configuration()
1226 …v->return_bandwidth_to_dcn =dcn_bw_min2(v->return_bus_width * v->dcfclk, v->fabric_and_dram_bandwi… in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
1234 …if (v->dcc_enabled_any_plane == dcn_bw_yes && v->return_bandwidth_to_dcn > v->dcfclk * v->return_b… in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
1235 …->pixel_chunk_size_in_kbyte) * 1024.0 / (v->return_bandwidth_to_dcn - v->dcfclk * v->return_bus_wi… in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
1237 …v->critical_compression = 2.0 * v->return_bus_width * v->dcfclk * v->urgent_latency / (v->return_b… in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
1239 …byte - v->pixel_chunk_size_in_kbyte) * 1024.0 * v->return_bus_width * v->dcfclk * v->urgent_latenc… in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
1241 …v->return_bandwidth_to_dcn =dcn_bw_min2(v->return_bus_width * v->dcfclk, v->fabric_and_dram_bandwi… in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
1242 …if (v->dcc_enabled_any_plane == dcn_bw_yes && v->return_bandwidth_to_dcn > v->dcfclk * v->return_b… in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
1243 …->pixel_chunk_size_in_kbyte) * 1024.0 / (v->return_bandwidth_to_dcn - v->dcfclk * v->return_bus_wi… in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
1245 …v->critical_compression = 2.0 * v->return_bus_width * v->dcfclk * v->urgent_latency / (v->return_b… in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
[all …]
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| D | dcn_calcs.c | 494 input->clks_cfg.dcfclk_mhz = v->dcfclk; in dcn_bw_calc_rq_dlg_ttu()
577 v->dcfclk = v->dcfclkv_nom0p8;
598 v->dcfclk = v->dcfclkv_max0p9;
618 v->dcfclk = v->dcfclk_per_state[v->voltage_level];
1163 context->bw_ctx.bw.dcn.clk.dcfclk_khz = (int)(v->dcfclk * 1000); in dcn_validate_bandwidth()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
| D | rn_clk_mgr.c | 315 regs_and_bypass->dcfclk = internal.CLK1_CLK3_CURRENT_CNT / 10; in rn_dump_clk_registers()
342 regs_and_bypass->dcfclk, in rn_dump_clk_registers()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
| D | vg_clk_mgr.c | 247 regs_and_bypass->dcfclk = internal.CLK1_CLK3_CURRENT_CNT / 10; in vg_dump_clk_registers()
274 regs_and_bypass->dcfclk, in vg_dump_clk_registers()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/inc/ |
| D | dcn_calcs.h | 213 float dcfclk; member
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/ |
| D | dml2_internal_shared_types.h | 38 unsigned int dcfclk; member
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
| D | dcn32_clk_mgr.c | 681 !dc->work_arounds.clock_update_disable_mask.dcfclk) { in dcn32_update_clocks()
928 regs_and_bypass->dcfclk = (DENTIST_DIVIDER_RANGE_SCALE_FACTOR in dcn32_dump_clk_registers()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| D | dcn32_fpu.c | 479 …unsigned int dcfclk = context->bw_ctx.dml.vba.DCFCLKState[vlevel][context->bw_ctx.dml.vba.maxMpcCo… in dcn32_set_phantom_stream_timing() local
507 pipes[0].clks_cfg.dcfclk_mhz = dcfclk; in dcn32_set_phantom_stream_timing()
2304 double dcfclk = dcn3_2_soc.clock_limits[0].dcfclk_mhz; in dcn32_calculate_wm_and_dlg_fpu() local
2425 dcfclk = dcn3_2_soc.clock_limits[2].dcfclk_mhz; in dcn32_calculate_wm_and_dlg_fpu()
2427 dcfclk = 615; //DCFCLK Vmin_lv in dcn32_calculate_wm_and_dlg_fpu()
2430 pipes[0].clks_cfg.dcfclk_mhz = dcfclk; in dcn32_calculate_wm_and_dlg_fpu()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/ |
| D | dcn401_clk_mgr.c | 353 regs_and_bypass->dcfclk = (DENTIST_DIVIDER_RANGE_SCALE_FACTOR in dcn401_dump_clk_registers()
485 clk_register_dump.dcfclk, in dcn401_auto_dpm_test_log()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/ |
| D | dc.h | 305 uint8_t dcfclk : 1; member
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
| D | dml2_core_shared.c | 775 mode_lib->ms.MaxDCFCLK = (double)min_clk_table->max_clocks_khz.dcfclk / 1000; in dml2_core_shared_mode_support()
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| D | dml2_core_dcn4_calcs.c | 7049 mode_lib->ms.MaxDCFCLK = (double)min_clk_table->max_clocks_khz.dcfclk / 1000; in dml_core_mode_support()
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