Searched refs:csr_set (Results 1 – 14 of 14) sorted by relevance
/linux-6.12.1/arch/riscv/include/asm/ |
D | irqflags.h | 21 csr_set(CSR_STATUS, SR_IE); in arch_local_irq_enable() 51 csr_set(CSR_STATUS, flags & SR_IE); in arch_local_irq_restore()
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D | vector.h | 70 csr_set(CSR_SSTATUS, SR_VS); in riscv_v_enable()
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D | csr.h | 521 #define csr_set(csr, val) \ macro
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/linux-6.12.1/drivers/irqchip/ |
D | irq-riscv-intc.c | 63 csr_set(CSR_IEH, BIT(d->hwirq - BITS_PER_LONG)); in riscv_intc_irq_unmask() 65 csr_set(CSR_IE, BIT(d->hwirq)); in riscv_intc_irq_unmask() 88 csr_set(CSR_IE, mask); in andes_intc_irq_unmask() 90 csr_set(ANDES_CSR_SLIE, mask); in andes_intc_irq_unmask()
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D | irq-riscv-imsic-state.c | 50 csr_set(CSR_IREG, val); in imsic_csr_set()
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/linux-6.12.1/arch/riscv/kernel/ |
D | kernel_mode_fpu.c | 18 csr_set(CSR_SSTATUS, SR_FS); in kernel_fpu_begin()
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D | cpufeature.c | 923 csr_set(CSR_ENVCFG, ENVCFG_CBZE); in riscv_user_isa_enable()
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/linux-6.12.1/tools/testing/selftests/kvm/include/riscv/ |
D | arch_timer.h | 42 csr_set(CSR_SIE, IE_TIE); in timer_irq_enable()
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D | processor.h | 169 csr_set(CSR_SSTATUS, SR_SIE); in local_irq_enable()
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/linux-6.12.1/arch/riscv/kvm/ |
D | aia.c | 456 csr_set(CSR_HGEIE, BIT(hgei)); in kvm_riscv_aia_wakeon_hgei() 552 csr_set(CSR_HIE, BIT(IRQ_S_GEXT)); in kvm_riscv_aia_enable()
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D | aia_imsic.c | 181 csr_set(CSR_VSIREG, __v); \
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/linux-6.12.1/drivers/clocksource/ |
D | timer-clint.c | 117 csr_set(CSR_IE, IE_TIE); in clint_clock_next_event()
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/linux-6.12.1/tools/arch/riscv/include/asm/ |
D | csr.h | 514 #define csr_set(csr, val) \ macro
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/linux-6.12.1/tools/testing/selftests/kvm/riscv/ |
D | sbi_pmu_test.c | 488 csr_set(CSR_IE, BIT(IRQ_PMU_OVF)); in test_pmu_events_overflow()
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