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Searched refs:csr_set (Results 1 – 14 of 14) sorted by relevance

/linux-6.12.1/arch/riscv/include/asm/
Dirqflags.h21 csr_set(CSR_STATUS, SR_IE); in arch_local_irq_enable()
51 csr_set(CSR_STATUS, flags & SR_IE); in arch_local_irq_restore()
Dvector.h70 csr_set(CSR_SSTATUS, SR_VS); in riscv_v_enable()
Dcsr.h521 #define csr_set(csr, val) \ macro
/linux-6.12.1/drivers/irqchip/
Dirq-riscv-intc.c63 csr_set(CSR_IEH, BIT(d->hwirq - BITS_PER_LONG)); in riscv_intc_irq_unmask()
65 csr_set(CSR_IE, BIT(d->hwirq)); in riscv_intc_irq_unmask()
88 csr_set(CSR_IE, mask); in andes_intc_irq_unmask()
90 csr_set(ANDES_CSR_SLIE, mask); in andes_intc_irq_unmask()
Dirq-riscv-imsic-state.c50 csr_set(CSR_IREG, val); in imsic_csr_set()
/linux-6.12.1/arch/riscv/kernel/
Dkernel_mode_fpu.c18 csr_set(CSR_SSTATUS, SR_FS); in kernel_fpu_begin()
Dcpufeature.c923 csr_set(CSR_ENVCFG, ENVCFG_CBZE); in riscv_user_isa_enable()
/linux-6.12.1/tools/testing/selftests/kvm/include/riscv/
Darch_timer.h42 csr_set(CSR_SIE, IE_TIE); in timer_irq_enable()
Dprocessor.h169 csr_set(CSR_SSTATUS, SR_SIE); in local_irq_enable()
/linux-6.12.1/arch/riscv/kvm/
Daia.c456 csr_set(CSR_HGEIE, BIT(hgei)); in kvm_riscv_aia_wakeon_hgei()
552 csr_set(CSR_HIE, BIT(IRQ_S_GEXT)); in kvm_riscv_aia_enable()
Daia_imsic.c181 csr_set(CSR_VSIREG, __v); \
/linux-6.12.1/drivers/clocksource/
Dtimer-clint.c117 csr_set(CSR_IE, IE_TIE); in clint_clock_next_event()
/linux-6.12.1/tools/arch/riscv/include/asm/
Dcsr.h514 #define csr_set(csr, val) \ macro
/linux-6.12.1/tools/testing/selftests/kvm/riscv/
Dsbi_pmu_test.c488 csr_set(CSR_IE, BIT(IRQ_PMU_OVF)); in test_pmu_events_overflow()