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Searched refs:crg (Results 1 – 18 of 18) sorted by relevance

/linux-6.12.1/arch/arm64/boot/dts/hisilicon/
Dhi3798cv200.dtsi126 crg: clock-reset-controller@8a22000 { label
127 compatible = "hisilicon,hi3798cv200-crg", "syscon", "simple-mfd";
160 clocks = <&crg HISTB_USB2_PHY1_REF_CLK>;
161 resets = <&crg 0xbc 4>;
168 resets = <&crg 0xbc 8>;
174 resets = <&crg 0xbc 9>;
181 clocks = <&crg HISTB_USB2_PHY2_REF_CLK>;
182 resets = <&crg 0xbc 6>;
189 resets = <&crg 0xbc 10>;
197 clocks = <&crg HISTB_COMBPHY0_CLK>;
[all …]
Dhi3670.dtsi186 compatible = "hisilicon,hi3670-media1-crg", "syscon";
192 compatible = "hisilicon,hi3670-media2-crg","syscon";
/linux-6.12.1/drivers/clk/hisilicon/
Dclk-hi3519.c128 struct hi3519_crg_data *crg = platform_get_drvdata(pdev); in hi3519_clk_unregister() local
134 crg->clk_data); in hi3519_clk_unregister()
137 crg->clk_data); in hi3519_clk_unregister()
140 crg->clk_data); in hi3519_clk_unregister()
145 struct hi3519_crg_data *crg; in hi3519_clk_probe() local
147 crg = devm_kmalloc(&pdev->dev, sizeof(*crg), GFP_KERNEL); in hi3519_clk_probe()
148 if (!crg) in hi3519_clk_probe()
151 crg->rstc = hisi_reset_init(pdev); in hi3519_clk_probe()
152 if (!crg->rstc) in hi3519_clk_probe()
155 crg->clk_data = hi3519_clk_register(pdev); in hi3519_clk_probe()
[all …]
Dcrg-hi3516cv300.c175 struct hisi_crg_dev *crg = platform_get_drvdata(pdev); in hi3516cv300_clk_unregister() local
180 ARRAY_SIZE(hi3516cv300_gate_clks), crg->clk_data); in hi3516cv300_clk_unregister()
182 ARRAY_SIZE(hi3516cv300_mux_clks), crg->clk_data); in hi3516cv300_clk_unregister()
184 ARRAY_SIZE(hi3516cv300_fixed_rate_clks), crg->clk_data); in hi3516cv300_clk_unregister()
234 struct hisi_crg_dev *crg = platform_get_drvdata(pdev); in hi3516cv300_sysctrl_clk_unregister() local
240 crg->clk_data); in hi3516cv300_sysctrl_clk_unregister()
263 struct hisi_crg_dev *crg; in hi3516cv300_crg_probe() local
265 crg = devm_kmalloc(&pdev->dev, sizeof(*crg), GFP_KERNEL); in hi3516cv300_crg_probe()
266 if (!crg) in hi3516cv300_crg_probe()
269 crg->funcs = of_device_get_match_data(&pdev->dev); in hi3516cv300_crg_probe()
[all …]
Dcrg-hi3798cv200.c256 struct hisi_crg_dev *crg = platform_get_drvdata(pdev); in hi3798cv200_clk_unregister() local
262 crg->clk_data); in hi3798cv200_clk_unregister()
265 crg->clk_data); in hi3798cv200_clk_unregister()
268 crg->clk_data); in hi3798cv200_clk_unregister()
321 struct hisi_crg_dev *crg = platform_get_drvdata(pdev); in hi3798cv200_sysctrl_clk_unregister() local
327 crg->clk_data); in hi3798cv200_sysctrl_clk_unregister()
346 struct hisi_crg_dev *crg; in hi3798cv200_crg_probe() local
348 crg = devm_kmalloc(&pdev->dev, sizeof(*crg), GFP_KERNEL); in hi3798cv200_crg_probe()
349 if (!crg) in hi3798cv200_crg_probe()
352 crg->funcs = of_device_get_match_data(&pdev->dev); in hi3798cv200_crg_probe()
[all …]
Dclk-hi3559a.c551 struct hisi_crg_dev *crg = platform_get_drvdata(pdev); in hi3559av100_clk_unregister() local
556 ARRAY_SIZE(hi3559av100_gate_clks), crg->clk_data); in hi3559av100_clk_unregister()
558 ARRAY_SIZE(hi3559av100_mux_clks_crg), crg->clk_data); in hi3559av100_clk_unregister()
560 ARRAY_SIZE(hi3559av100_fixed_rate_clks_crg), crg->clk_data); in hi3559av100_clk_unregister()
752 struct hisi_crg_dev *crg = platform_get_drvdata(pdev); in hi3559av100_shub_clk_unregister() local
757 ARRAY_SIZE(hi3559av100_shub_gate_clks), crg->clk_data); in hi3559av100_shub_clk_unregister()
759 ARRAY_SIZE(hi3559av100_shub_div_clks), crg->clk_data); in hi3559av100_shub_clk_unregister()
761 ARRAY_SIZE(hi3559av100_shub_mux_clks), crg->clk_data); in hi3559av100_shub_clk_unregister()
763 ARRAY_SIZE(hi3559av100_shub_fixed_rate_clks), crg->clk_data); in hi3559av100_shub_clk_unregister()
786 struct hisi_crg_dev *crg; in hi3559av100_crg_probe() local
[all …]
DMakefile11 obj-$(CONFIG_COMMON_CLK_HI3516CV300) += crg-hi3516cv300.o
16 obj-$(CONFIG_COMMON_CLK_HI3798CV200) += crg-hi3798cv200.o
/linux-6.12.1/arch/arm/boot/dts/hisilicon/
Dhi3519.dtsi37 crg: clock-reset-controller@12010000 { label
38 compatible = "hisilicon,hi3519-crg";
55 clocks = <&crg HI3519_UART0_CLK>, <&crg HI3519_UART0_CLK>;
64 clocks = <&crg HI3519_UART1_CLK>, <&crg HI3519_UART1_CLK>;
73 clocks = <&crg HI3519_UART2_CLK>, <&crg HI3519_UART2_CLK>;
82 clocks = <&crg HI3519_UART3_CLK>, <&crg HI3519_UART3_CLK>;
91 clocks = <&crg HI3519_UART4_CLK>, <&crg HI3519_UART4_CLK>;
130 clocks = <&crg HI3519_SPI0_CLK>, <&crg HI3519_SPI0_CLK>;
142 clocks = <&crg HI3519_SPI1_CLK>, <&crg HI3519_SPI1_CLK>;
154 clocks = <&crg HI3519_SPI2_CLK>, <&crg HI3519_SPI2_CLK>;
/linux-6.12.1/Documentation/devicetree/bindings/phy/
Dphy-hisi-inno-usb2.txt39 clocks = <&crg HISTB_USB2_PHY1_REF_CLK>;
40 resets = <&crg 0xbc 4>;
47 resets = <&crg 0xbc 8>;
53 resets = <&crg 0xbc 9>;
60 clocks = <&crg HISTB_USB2_PHY2_REF_CLK>;
61 resets = <&crg 0xbc 6>;
68 resets = <&crg 0xbc 10>;
/linux-6.12.1/Documentation/devicetree/bindings/pci/
Dhisilicon-histb-pcie.txt60 clocks = <&crg PCIE_AUX_CLK>,
61 <&crg PCIE_PIPE_CLK>,
62 <&crg PCIE_SYS_CLK>,
63 <&crg PCIE_BUS_CLK>;
65 resets = <&crg 0x18c 6>, <&crg 0x18c 5>, <&crg 0x18c 4>;
/linux-6.12.1/Documentation/devicetree/bindings/usb/
Dhisilicon,histb-xhci.txt36 clocks = <&crg HISTB_USB3_BUS_CLK>,
37 <&crg HISTB_USB3_UTMI_CLK>,
38 <&crg HISTB_USB3_PIPE_CLK>,
39 <&crg HISTB_USB3_SUSPEND_CLK>;
41 resets = <&crg 0xb0 12>;
/linux-6.12.1/Documentation/devicetree/bindings/net/
Dhisilicon-hix5hd2-gmac.txt51 clocks = <&crg HISTB_ETH0_MAC_CLK>, <&crg HISTB_ETH0_MACIF_CLK>;
53 resets = <&crg 0xcc 8>, <&crg 0xcc 10>, <&crg 0xcc 12>;
Dhisilicon-femac.txt34 clocks = <&crg HI3518EV200_ETH_CLK>;
35 resets = <&crg 0xec 0>,<&crg 0xec 3>;
Dhisilicon-femac-mdio.txt15 clocks = <&crg HI3516CV300_MDIO_CLK>;
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dhisi-crg.txt13 - "hisilicon,hi3516cv300-crg"
15 - "hisilicon,hi3519-crg"
16 - "hisilicon,hi3798cv200-crg"
38 compatible = "hisilicon,hi3519-crg";
Dhi3670-clock.txt16 - "hisilicon,hi3670-media1-crg"
17 - "hisilicon,hi3670-media2-crg"
/linux-6.12.1/arch/x86/kernel/cpu/resctrl/
Drdtgroup.c896 struct rdtgroup *crg; in proc_resctrl_show() local
912 list_for_each_entry(crg, &rdtg->mon.crdtgrp_list, in proc_resctrl_show()
914 if (!resctrl_arch_match_rmid(tsk, crg->mon.parent->closid, in proc_resctrl_show()
915 crg->mon.rmid)) in proc_resctrl_show()
917 seq_printf(s, "%s", crg->kn->name); in proc_resctrl_show()
/linux-6.12.1/arch/riscv/boot/dts/starfive/
Djh7110.dtsi8 #include <dt-bindings/clock/starfive,jh7110-crg.h>
10 #include <dt-bindings/reset/starfive,jh7110-crg.h>