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Searched refs:control_offset (Results 1 – 5 of 5) sorted by relevance

/linux-6.12.1/drivers/mfd/
Dtwl4030-irq.c59 u8 control_offset; /* for SIH_CTRL */ member
83 .control_offset = TWL4030_ ## modname ## _SIH_CTRL, \
113 .control_offset = REG_GPIO_SIH_CTRL,
137 .control_offset = TWL4030_INTERRUPTS_BCISIHCTRL,
173 .control_offset = REG_GPIO_SIH_CTRL,
197 .control_offset = TWL5031_INTERRUPTS_BCISIHCTRL,
246 .control_offset = TWL5031_ACCSIHCTRL,
357 sih->control_offset); in twl4030_init_sih_modules()
/linux-6.12.1/drivers/input/rmi4/
Drmi_f12.c267 u16 control_offset = 0; in rmi_f12_write_control_regs() local
274 control_offset = rmi_register_desc_calc_reg_offset( in rmi_f12_write_control_regs()
286 + control_offset, buf, control_size); in rmi_f12_write_control_regs()
306 fn->fd.control_base_addr + control_offset, in rmi_f12_write_control_regs()
/linux-6.12.1/drivers/staging/greybus/
Daudio_codec.h154 unsigned long control_offset; member
Daudio_topology.c1332 module->control_offset = module->dai_offset + in gbaudio_tplg_process_header()
1334 module->widget_offset = module->control_offset + in gbaudio_tplg_process_header()
1341 module->control_offset); in gbaudio_tplg_process_header()
1368 controls = (struct gb_audio_control *)module->control_offset; in gbaudio_tplg_parse_data()
/linux-6.12.1/drivers/platform/x86/intel/speed_select_if/
Disst_tpmi_core.c258 struct pp_control_offset control_offset; member