Searched refs:content_revision (Results 1 – 17 of 17) sorted by relevance
336 switch (header->content_revision) { in smu_v12_0_get_vbios_bootup_values()373 smu->smu_table.boot_values.content_revision = header->content_revision; in smu_v12_0_get_vbios_bootup_values()396 (smu->smu_table.boot_values.content_revision >= 2)) in smu_v12_0_get_vbios_bootup_values()
280 uint8_t format_revision, content_revision; in pp_atomfwctrl_get_avfs_information() local294 content_revision = ((struct atom_common_table_header *)profile)->content_revision; in pp_atomfwctrl_get_avfs_information()296 if (format_revision == 4 && content_revision == 1) { in pp_atomfwctrl_get_avfs_information()375 } else if (format_revision == 4 && content_revision == 2) { in pp_atomfwctrl_get_avfs_information()604 if ((info->format_revision == 3) && (info->content_revision == 2)) { in pp_atomfwctrl_get_vbios_bootup_values()608 } else if ((info->format_revision == 3) && (info->content_revision == 1)) { in pp_atomfwctrl_get_vbios_bootup_values()
2872 gpu_metrics->common_header.content_revision = 0; in vega12_init_gpu_metrics_v1_0()
4318 gpu_metrics->common_header.content_revision = 0; in vega20_init_gpu_metrics_v1_0()
49 uint8_t content_revision; member
472 uint8_t content_revision; member
236 …uint8_t content_revision; //change it when a data table has a structure change, or a hw function… member
819 pcie_reg_state->common_header.content_revision = 0; in aqua_vanjaram_read_pcie_state()903 xgmi_reg_state->common_header.content_revision = 0; in aqua_vanjaram_read_xgmi_state()976 wafl_reg_state->common_header.content_revision = 0; in aqua_vanjaram_read_wafl_state()1095 usr_reg_state->common_header.content_revision = 0; in aqua_vanjaram_read_usr_state()
545 switch (header->content_revision) { in smu_v11_0_get_vbios_bootup_values()582 smu->smu_table.boot_values.content_revision = header->content_revision; in smu_v11_0_get_vbios_bootup_values()610 (smu->smu_table.boot_values.content_revision >= 2)) in smu_v11_0_get_vbios_bootup_values()
425 smc_dpm_table->table_header.content_revision); in navi10_append_powerplay_table()432 switch (smc_dpm_table->table_header.content_revision) { in navi10_append_powerplay_table()447 smc_dpm_table->table_header.content_revision); in navi10_append_powerplay_table()
526 smc_dpm_table->table_header.content_revision); in arcturus_append_powerplay_table()529 (smc_dpm_table->table_header.content_revision == 6)) in arcturus_append_powerplay_table()
583 switch (header->content_revision) { in smu_v14_0_get_vbios_bootup_values()632 smu->smu_table.boot_values.content_revision = header->content_revision; in smu_v14_0_get_vbios_bootup_values()
600 switch (header->content_revision) { in smu_v13_0_get_vbios_bootup_values()649 smu->smu_table.boot_values.content_revision = header->content_revision; in smu_v13_0_get_vbios_bootup_values()
462 smc_dpm_table->table_header.content_revision); in aldebaran_append_powerplay_table()465 (smc_dpm_table->table_header.content_revision == 10)) in aldebaran_append_powerplay_table()
132 (uint32_t) atom_data_tbl->content_revision & 0x3f; in get_atom_data_table_revision()487 if (header->table_header.content_revision != 1) in get_gpio_i2c_info()676 if (header->table_header.content_revision != 1) in bios_parser_get_gpio_pin_info()1450 && (lvds->table_header.content_revision >= 1))) in get_embedded_panel_info_v2_1()
1108 header->content_revision = crev; in smu_cmn_init_soft_gpu_metrics()
301 uint32_t content_revision; member