Searched refs:clock_reg (Results 1 – 2 of 2) sorted by relevance
281 u32 clock_reg; member428 msg.data32 = port->clock_reg; in hss_config()1351 &port->clock_rate, &port->clock_reg); in hss_hdlc_ioctl()1354 port->clock_reg = CLK42X_SPEED_2048KHZ; in hss_hdlc_ioctl()1504 port->clock_reg = CLK42X_SPEED_2048KHZ; in ixp4xx_hss_probe()
856 u32 clock_reg[] = { in request_even_slower_clocks() local869 for (i = 0; i < ARRAY_SIZE(clock_reg); i++) { in request_even_slower_clocks()873 val = readl(prcmu_base + clock_reg[i]); in request_even_slower_clocks()889 writel(val, prcmu_base + clock_reg[i]); in request_even_slower_clocks()