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Searched refs:clk_div (Results 1 – 25 of 90) sorted by relevance

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/linux-6.12.1/drivers/pwm/
Dpwm-crc.c42 int clk_div; in crc_pwm_calc_clk_div() local
44 clk_div = PWM_BASE_CLK_MHZ * period_ns / (256 * NSEC_PER_USEC); in crc_pwm_calc_clk_div()
46 if (clk_div > 0) in crc_pwm_calc_clk_div()
47 clk_div--; in crc_pwm_calc_clk_div()
49 return clk_div; in crc_pwm_calc_clk_div()
100 int clk_div = crc_pwm_calc_clk_div(state->period); in crc_pwm_apply() local
104 clk_div | pwm_output_enable); in crc_pwm_apply()
127 unsigned int clk_div, clk_div_reg, duty_cycle_reg; in crc_pwm_get_state() local
142 clk_div = (clk_div_reg & ~PWM_OUTPUT_ENABLE) + 1; in crc_pwm_get_state()
145 DIV_ROUND_UP(clk_div * NSEC_PER_USEC * 256, PWM_BASE_CLK_MHZ); in crc_pwm_get_state()
Dpwm-mtk-disp.c73 u32 clk_div, period, high_width, value; in mtk_disp_pwm_apply() local
118 clk_div = mul_u64_u64_div_u64(state->period, rate, NSEC_PER_SEC) >> in mtk_disp_pwm_apply()
120 if (clk_div > PWM_CLKDIV_MAX) { in mtk_disp_pwm_apply()
128 div = NSEC_PER_SEC * (clk_div + 1); in mtk_disp_pwm_apply()
151 clk_div << PWM_CLKDIV_SHIFT); in mtk_disp_pwm_apply()
178 u32 clk_div, pwm_en, con0, con1; in mtk_disp_pwm_get_state() local
209 clk_div = FIELD_GET(PWM_CLKDIV_MASK, con0); in mtk_disp_pwm_get_state()
215 state->period = DIV64_U64_ROUND_UP(period * (clk_div + 1) * NSEC_PER_SEC, rate); in mtk_disp_pwm_get_state()
217 state->duty_cycle = DIV64_U64_ROUND_UP(high_width * (clk_div + 1) * NSEC_PER_SEC, in mtk_disp_pwm_get_state()
/linux-6.12.1/drivers/net/ethernet/xilinx/
Dll_temac_mdio.c70 int clk_div; in temac_mdio_setup() local
82 clk_div = 0x3f; /* worst-case default setting */ in temac_mdio_setup()
84 clk_div = bus_hz / (2500 * 1000 * 2) - 1; in temac_mdio_setup()
85 if (clk_div < 1) in temac_mdio_setup()
86 clk_div = 1; in temac_mdio_setup()
87 if (clk_div > 0x3f) in temac_mdio_setup()
88 clk_div = 0x3f; in temac_mdio_setup()
94 temac_indirect_out32(lp, XTE_MC_OFFSET, 1 << 6 | clk_div); in temac_mdio_setup()
Dxilinx_axienet_mdio.c179 u32 clk_div; in axienet_mdio_enable() local
240 clk_div = (host_clock / (mdio_freq * 2)) - 1; in axienet_mdio_enable()
247 clk_div++; in axienet_mdio_enable()
250 if (clk_div & ~XAE_MDIO_MC_CLOCK_DIVIDE_MAX) { in axienet_mdio_enable()
254 lp->mii_clk_div = (u8)clk_div; in axienet_mdio_enable()
/linux-6.12.1/drivers/mfd/
Dfsl-imx25-tsadc.c103 unsigned clk_div; in mx25_tsadc_setup_clk() local
115 clk_div = DIV_ROUND_UP(clk_get_rate(tsadc->clk), 1750000); in mx25_tsadc_setup_clk()
116 dev_dbg(&pdev->dev, "Setting up ADC clock divider to %u\n", clk_div); in mx25_tsadc_setup_clk()
119 clk_div -= 2; in mx25_tsadc_setup_clk()
120 clk_div /= 2; in mx25_tsadc_setup_clk()
126 clk_div = max_t(unsigned, 4, clk_div); in mx25_tsadc_setup_clk()
129 clk_get_rate(tsadc->clk) / (2 * clk_div + 2)); in mx25_tsadc_setup_clk()
133 MX25_TGCR_ADCCLKCFG(clk_div)); in mx25_tsadc_setup_clk()
/linux-6.12.1/drivers/clk/mxs/
Dclk-div.c21 struct clk_div { struct
28 static inline struct clk_div *to_clk_div(struct clk_hw *hw) in to_clk_div() argument
32 return container_of(divider, struct clk_div, divider); in to_clk_div()
38 struct clk_div *div = to_clk_div(hw); in clk_div_recalc_rate()
46 struct clk_div *div = to_clk_div(hw); in clk_div_round_rate()
54 struct clk_div *div = to_clk_div(hw); in clk_div_set_rate()
73 struct clk_div *div; in mxs_clk_div()
/linux-6.12.1/arch/mips/ath25/
Dar2315.c208 unsigned int clk_div; in ar2315_sys_clk() local
221 clk_div = ATH25_REG_MS(pllc_ctrl, AR2315_PLLC_CLKM_DIV); in ar2315_sys_clk()
222 clk_div = pllc_divide_table[clk_div]; in ar2315_sys_clk()
225 clk_div = ATH25_REG_MS(pllc_ctrl, AR2315_PLLC_CLKC_DIV); in ar2315_sys_clk()
226 clk_div = pllc_divide_table[clk_div]; in ar2315_sys_clk()
230 clk_div = 1; in ar2315_sys_clk()
237 return pllc_out / (clk_div * cpu_div); in ar2315_sys_clk()
/linux-6.12.1/sound/soc/ti/
Ddavinci-i2s.c159 int clk_div; member
452 dev->clk_div = div; in davinci_i2s_dai_set_clkdiv()
463 unsigned int clk_div, freq, framesize; in davinci_i2s_hw_params() local
518 clk_div = 256; in davinci_i2s_hw_params()
520 framesize = (freq / (--clk_div)) / in davinci_i2s_hw_params()
524 (clk_div)); in davinci_i2s_hw_params()
525 clk_div--; in davinci_i2s_hw_params()
529 clk_div = freq / (mcbsp_word_length * 16) / in davinci_i2s_hw_params()
534 clk_div &= 0xFF; in davinci_i2s_hw_params()
535 srgr |= clk_div; in davinci_i2s_hw_params()
[all …]
/linux-6.12.1/drivers/i2c/busses/
Di2c-sun6i-p2wi.c192 int clk_div; in p2wi_probe() local
286 clk_div = parent_clk_freq / clk_freq; in p2wi_probe()
287 if (!clk_div) { in p2wi_probe()
291 clk_div = 1; in p2wi_probe()
292 } else if (clk_div > P2WI_CCR_MAX_CLK_DIV) { in p2wi_probe()
296 clk_div = P2WI_CCR_MAX_CLK_DIV; in p2wi_probe()
299 writel(P2WI_CCR_SDA_OUT_DELAY(1) | P2WI_CCR_CLK_DIV(clk_div), in p2wi_probe()
Di2c-mt7621.c65 u32 clk_div; member
96 iowrite32(((i2c->clk_div << 16) & SM0CTL0_CLK_DIV_MASK) | SM0CTL0_EN | in mtk_i2c_reset()
263 i2c->clk_div = clk_get_rate(i2c->clk) / i2c->bus_freq - 1; in mtk_i2c_init()
264 if (i2c->clk_div < 99) in mtk_i2c_init()
265 i2c->clk_div = 99; in mtk_i2c_init()
266 if (i2c->clk_div > SM0CTL0_CLK_DIV_MAX) in mtk_i2c_init()
267 i2c->clk_div = SM0CTL0_CLK_DIV_MAX; in mtk_i2c_init()
Di2c-pasemi-platform.c32 data->smbus.clk_div = DIV_ROUND_UP(clk_rate, 16 * frequency); in pasemi_platform_i2c_calc_clk_div()
33 if (data->smbus.clk_div < 4) in pasemi_platform_i2c_calc_clk_div()
37 if (data->smbus.clk_div > 0xff) in pasemi_platform_i2c_calc_clk_div()
/linux-6.12.1/drivers/spi/
Dspi-hisi-kunpeng.c117 u16 clk_div; /* baud rate divider */ member
280 if (chip->clk_div % chip->div_pre == 0) in __hisi_calc_div_reg()
286 if (chip->div_pre > chip->clk_div) in __hisi_calc_div_reg()
287 chip->div_pre = chip->clk_div; in __hisi_calc_div_reg()
289 chip->div_post = (chip->clk_div / chip->div_pre) - 1; in __hisi_calc_div_reg()
298 chip->clk_div = DIV_ROUND_UP(host->max_speed_hz, speed_hz) + 1; in hisi_calc_effective_speed()
299 chip->clk_div &= 0xfffe; in hisi_calc_effective_speed()
300 if (chip->clk_div > CLK_DIV_MAX) in hisi_calc_effective_speed()
301 chip->clk_div = CLK_DIV_MAX; in hisi_calc_effective_speed()
303 effective_speed = host->max_speed_hz / chip->clk_div; in hisi_calc_effective_speed()
Dspi-axi-spi-engine.c222 unsigned int clk_div, max_hz = msg->spi->controller->max_speed_hz; in spi_engine_precompile_message() local
226 clk_div = DIV_ROUND_UP(max_hz, xfer->speed_hz); in spi_engine_precompile_message()
227 xfer->effective_speed_hz = max_hz / min(clk_div, 256U); in spi_engine_precompile_message()
237 int clk_div, new_clk_div, inst_ns; in spi_engine_compile_message() local
247 clk_div = 1; in spi_engine_compile_message()
258 if (new_clk_div != clk_div) { in spi_engine_compile_message()
259 clk_div = new_clk_div; in spi_engine_compile_message()
263 clk_div - 1)); in spi_engine_compile_message()
304 if (clk_div != 1) in spi_engine_compile_message()
Dspi-s3c64xx.c170 int clk_div; member
698 int div = sdd->port_conf->clk_div; in s3c64xx_spi_config()
1008 div = sdd->port_conf->clk_div; in s3c64xx_spi_setup()
1517 .clk_div = 2,
1527 .clk_div = 2,
1536 .clk_div = 2,
1546 .clk_div = 2,
1558 .clk_div = 2,
1570 .clk_div = 2,
1582 .clk_div = 4,
[all …]
/linux-6.12.1/drivers/clk/
Dclk-versaclock3.c587 static struct vc3_hw_data clk_div[5]; variable
591 { .hw = &clk_div[VC3_DIV2].hw }
791 static struct vc3_hw_data clk_div[] = { variable
894 &clk_div[VC3_DIV5].hw,
895 &clk_div[VC3_DIV4].hw
910 &clk_div[VC3_DIV5].hw,
911 &clk_div[VC3_DIV4].hw
926 &clk_div[VC3_DIV2].hw,
927 &clk_div[VC3_DIV4].hw
942 &clk_div[VC3_DIV1].hw,
[all …]
/linux-6.12.1/drivers/bus/
Dsunxi-rsb.c655 int clk_div, ret; in sunxi_rsb_hw_init() local
682 clk_div = p_clk_freq / rsb->clk_freq / 2; in sunxi_rsb_hw_init()
683 if (!clk_div) in sunxi_rsb_hw_init()
684 clk_div = 1; in sunxi_rsb_hw_init()
685 else if (clk_div > RSB_CCR_MAX_CLK_DIV + 1) in sunxi_rsb_hw_init()
686 clk_div = RSB_CCR_MAX_CLK_DIV + 1; in sunxi_rsb_hw_init()
688 clk_delay = clk_div >> 1; in sunxi_rsb_hw_init()
692 dev_info(dev, "RSB running at %lu Hz\n", p_clk_freq / clk_div / 2); in sunxi_rsb_hw_init()
693 writel(RSB_CCR_SDA_OUT_DELAY(clk_delay) | RSB_CCR_CLK_DIV(clk_div - 1), in sunxi_rsb_hw_init()
/linux-6.12.1/include/linux/dma/
Dqcom-gpi-dma.h43 u32 clk_div; member
77 u16 clk_div; member
/linux-6.12.1/sound/soc/sti/
Duniperif_player.c316 int clk_div; in uni_player_prepare_iec958() local
318 clk_div = player->mclk / runtime->rate; in uni_player_prepare_iec958()
321 if ((clk_div % 128) || (clk_div <= 0)) { in uni_player_prepare_iec958()
323 __func__, clk_div); in uni_player_prepare_iec958()
398 SET_UNIPERIF_CTRL_DIVIDER(player, clk_div / 128); in uni_player_prepare_iec958()
419 int output_frame_size, slot_width, clk_div; in uni_player_prepare_pcm() local
430 clk_div = player->mclk / runtime->rate; in uni_player_prepare_pcm()
435 if ((slot_width == 32) && (clk_div % 128)) { in uni_player_prepare_pcm()
440 if ((slot_width == 16) && (clk_div % 64)) { in uni_player_prepare_pcm()
487 SET_UNIPERIF_CTRL_DIVIDER(player, clk_div / (2 * output_frame_size)); in uni_player_prepare_pcm()
/linux-6.12.1/sound/soc/codecs/
Dlpass-va-macro.c614 u8 clk_div; in va_dmic_clk_enable() local
652 clk_div = va->dmic_clk_div; in va_dmic_clk_enable()
661 clk_div << CDC_VA_DMIC_CLK_SEL_SHFT); in va_dmic_clk_enable()
666 if (*dmic_clk_div > clk_div) { in va_dmic_clk_enable()
673 clk_div << CDC_VA_DMIC_CLK_SEL_SHFT); in va_dmic_clk_enable()
679 clk_div = *dmic_clk_div; in va_dmic_clk_enable()
682 *dmic_clk_div = clk_div; in va_dmic_clk_enable()
688 clk_div = 0; in va_dmic_clk_enable()
691 clk_div << CDC_VA_DMIC_CLK_SEL_SHFT); in va_dmic_clk_enable()
693 clk_div = va->dmic_clk_div; in va_dmic_clk_enable()
[all …]
/linux-6.12.1/drivers/media/dvb-frontends/
Dstv6110.c29 u8 clk_div; member
214 priv->regs[RSTV6110_CTRL2] |= (priv->clk_div << 6); in stv6110_init()
398 reg0[2] |= (config->clk_div << 6); in stv6110_attach()
418 priv->clk_div = config->clk_div; in stv6110_attach()
/linux-6.12.1/drivers/leds/
Dleds-bcm6358.c153 u32 clk_div; in bcm6358_leds_probe() local
169 of_property_read_u32(np, "brcm,clk-div", &clk_div); in bcm6358_leds_probe()
170 switch (clk_div) { in bcm6358_leds_probe()
/linux-6.12.1/drivers/media/i2c/
Drj54n1cb0c.c157 struct rj54n1_clock_div clk_div; member
417 static const struct rj54n1_clock_div clk_div = { variable
839 rj54n1->clk_div.ratio_tg); in rj54n1_set_clock()
842 rj54n1->clk_div.ratio_t); in rj54n1_set_clock()
845 rj54n1->clk_div.ratio_r); in rj54n1_set_clock()
858 rj54n1->clk_div.ratio_op); in rj54n1_set_clock()
861 rj54n1->clk_div.ratio_o); in rj54n1_set_clock()
1336 rj54n1->clk_div = clk_div; in rj54n1_probe()
1346 (clk_div.ratio_tg + 1) / (clk_div.ratio_t + 1); in rj54n1_probe()
/linux-6.12.1/drivers/video/fbdev/omap/
Dsossi.c60 int clk_div; member
124 int div = t->clk_div; in calc_rd_timings()
175 int div = t->clk_div; in calc_wr_timings()
258 _set_timing(sossi.clk_div, in set_timing()
317 int div = t->clk_div; in sossi_convert_timings()
348 sossi.clk_div = t->tim[4]; in sossi_set_timings()
/linux-6.12.1/drivers/gpu/drm/renesas/shmobile/
Dshmob_drm_crtc.c205 unsigned int clk_div = sdev->config.clk_div; in shmob_drm_crtc_atomic_enable() local
227 if (clk_div) { in shmob_drm_crtc_atomic_enable()
232 lcdc_write(sdev, LDDCKPAT2R, (1 << (clk_div / 2)) - 1); in shmob_drm_crtc_atomic_enable()
234 if (clk_div == 1) in shmob_drm_crtc_atomic_enable()
237 value |= clk_div; in shmob_drm_crtc_atomic_enable()
Dshmob_drm_drv.c211 sdev->config.clk_div = pdata->iface.clk_div; in shmob_drm_probe()
271 .clk_div = 5,

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