Home
last modified time | relevance | path

Searched refs:clk_ctrls (Results 1 – 24 of 24) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/msm/disp/dpu1/catalog/
Ddpu_4_1_sdm670.h15 .clk_ctrls = {
Ddpu_6_3_sm6115.h22 .clk_ctrls = {
Ddpu_6_5_qcm2290.h22 .clk_ctrls = {
Ddpu_6_9_sm6375.h23 .clk_ctrls = {
Ddpu_3_3_sdm630.h26 .clk_ctrls = {
Ddpu_6_2_sc7180.h22 .clk_ctrls = {
Ddpu_5_4_sm6125.h26 .clk_ctrls = {
Ddpu_6_4_sm6350.h24 .clk_ctrls = {
Ddpu_7_2_sc7280.h22 .clk_ctrls = {
Ddpu_3_2_sdm660.h26 .clk_ctrls = {
Ddpu_4_0_sdm845.h27 .clk_ctrls = {
Ddpu_3_0_msm8998.h27 .clk_ctrls = {
Ddpu_5_2_sm7150.h27 .clk_ctrls = {
Ddpu_7_0_sm8350.h24 .clk_ctrls = {
Ddpu_5_0_sm8150.h27 .clk_ctrls = {
Ddpu_9_0_sm8550.h25 .clk_ctrls = {
Ddpu_6_0_sm8250.h24 .clk_ctrls = {
Ddpu_5_1_sc8180x.h27 .clk_ctrls = {
Ddpu_10_0_sm8650.h25 .clk_ctrls = {
Ddpu_8_1_sm8450.h25 .clk_ctrls = {
Ddpu_8_0_sc8280xp.h25 .clk_ctrls = {
Ddpu_9_2_x1e80100.h24 .clk_ctrls = {
/linux-6.12.1/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_catalog.h475 struct dpu_clk_ctrl_reg clk_ctrls[DPU_CLK_CTRL_MAX]; member
Ddpu_hw_top.c79 return dpu_hw_clk_force_ctrl(&mdp->hw, &mdp->caps->clk_ctrls[clk_ctrl], enable); in dpu_hw_setup_clk_force_ctrl()