Searched refs:clk_ctrl_reg (Results 1 – 4 of 4) sorted by relevance
/linux-6.12.1/drivers/gpu/drm/msm/disp/dpu1/ |
D | dpu_hw_util.c | 541 const struct dpu_clk_ctrl_reg *clk_ctrl_reg, in dpu_hw_clk_force_ctrl() argument 547 reg_val = DPU_REG_READ(c, clk_ctrl_reg->reg_off); in dpu_hw_clk_force_ctrl() 550 new_val = reg_val | BIT(clk_ctrl_reg->bit_off); in dpu_hw_clk_force_ctrl() 552 new_val = reg_val & ~BIT(clk_ctrl_reg->bit_off); in dpu_hw_clk_force_ctrl() 554 DPU_REG_WRITE(c, clk_ctrl_reg->reg_off, new_val); in dpu_hw_clk_force_ctrl() 556 clk_forced_on = !(reg_val & BIT(clk_ctrl_reg->bit_off)); in dpu_hw_clk_force_ctrl()
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D | dpu_hw_util.h | 372 const struct dpu_clk_ctrl_reg *clk_ctrl_reg,
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/linux-6.12.1/drivers/hwmon/ |
D | aspeed-pwm-tacho.c | 209 u32 clk_ctrl_reg; member 220 .clk_ctrl_reg = ASPEED_PTCR_CLK_CTRL, 229 .clk_ctrl_reg = ASPEED_PTCR_CLK_CTRL, 238 .clk_ctrl_reg = ASPEED_PTCR_CLK_CTRL_EXT, 398 regmap_update_bits(regmap, type_params[type].clk_ctrl_reg, in aspeed_set_pwm_clock_values()
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/linux-6.12.1/drivers/spi/ |
D | spi-ti-qspi.c | 175 u32 clk_ctrl_reg, clk_rate, clk_ctrl_new; in ti_qspi_setup_clk() local 186 clk_ctrl_reg = ti_qspi_read(qspi, QSPI_SPI_CLOCK_CNTRL_REG); in ti_qspi_setup_clk() 188 clk_ctrl_reg &= ~QSPI_CLK_EN; in ti_qspi_setup_clk() 191 ti_qspi_write(qspi, clk_ctrl_reg, QSPI_SPI_CLOCK_CNTRL_REG); in ti_qspi_setup_clk()
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