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Searched refs:channel_width (Results 1 – 19 of 19) sorted by relevance

/linux-6.12.1/drivers/staging/rtl8723bs/include/
Dhal_phy_cfg.h50 enum channel_width BandWidth, u8 Channel);
56 void PHY_SetBWMode8723B(struct adapter *Adapter, enum channel_width Bandwidth,
63 enum channel_width Bandwidth,
Dhal_com_phycfg.h80 enum channel_width BandWidth, u8 Channel,
91 enum channel_width BandWidth, u8 Channel);
94 enum channel_width Bandwidth, u8 RfPath, u8 DataRate,
Drtl8723b_rf.h15 enum channel_width Bandwidth);
Drtw_rf.h80 enum channel_width { enum
Dhal_intf.h197 void (*set_bwmode_handler)(struct adapter *padapter, enum channel_width Bandwidth, u8 Offset);
199 …void (*set_chnl_bw_handler)(struct adapter *padapter, u8 channel, enum channel_width Bandwidth, u8…
342 void rtw_hal_set_chnl_bw(struct adapter *padapter, u8 channel, enum channel_width Bandwidth, u8 Off…
Dhal_data.h177 enum channel_width CurrentChannelBW;
/linux-6.12.1/drivers/gpu/drm/i915/display/
Dintel_bw.c38 u8 channel_width; member
230 qi->channel_width = 64; in icl_get_qgv_points()
236 qi->channel_width = 32; in icl_get_qgv_points()
243 qi->channel_width = 16; in icl_get_qgv_points()
247 qi->channel_width = 32; in icl_get_qgv_points()
258 qi->channel_width = 64; in icl_get_qgv_points()
264 qi->channel_width = 32; in icl_get_qgv_points()
271 qi->channel_width = 32; in icl_get_qgv_points()
279 qi->channel_width = 16; in icl_get_qgv_points()
506 peakbw = num_channels * DIV_ROUND_UP(qi.channel_width, 8) * dclk_max; in tgl_get_bw_info()
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/linux-6.12.1/drivers/staging/rtl8723bs/hal/
Drtl8723b_phycfg.c532 enum channel_width BandWidth, in PHY_GetTxPowerIndex()
583 struct adapter *Adapter, enum channel_width CurrentBW in phy_SetRegBW_8723B()
703 enum channel_width ChnlWidth, in PHY_HandleSwChnlAndSetBW8723B()
712 enum channel_width tmpBW = pHalData->CurrentChannelBW; in PHY_HandleSwChnlAndSetBW8723B()
769 enum channel_width Bandwidth, /* 20M or 40M */ in PHY_SetBWMode8723B()
787 enum channel_width Bandwidth, in PHY_SetSwChnlBWMode8723B()
Drtl8723b_rf6052.c58 struct adapter *Adapter, enum channel_width Bandwidth in PHY_RF6052SetBandwidth8723B()
Dhal_com_phycfg.c455 enum channel_width BandWidth, in PHY_GetTxPowerIndexBase()
623 enum channel_width BandWidth, in PHY_SetTxPowerIndexByRateArray()
656 static s16 get_bandwidth_idx(const enum channel_width bandwidth) in get_bandwidth_idx()
685 enum channel_width bandwidth, in phy_get_tx_pwr_lmt()
Dhal_intf.c329 enum channel_width Bandwidth, u8 Offset40, u8 Offset80) in rtw_hal_set_chnl_bw()
/linux-6.12.1/drivers/net/wireless/rsi/
Drsi_91x_mgmt.c276 common->channel_width = BW_20MHZ; in rsi_set_default_parameters()
403 if (common->channel_width == BW_40MHZ) { in rsi_load_radio_caps()
428 common->channel_width == BW_20MHZ) in rsi_load_radio_caps()
741 vap_caps->channel_bw = common->channel_width; in rsi_set_vap_capabilities()
933 if (common->channel_width == BW_40MHZ) { in rsi_load_bootup_params()
983 if (common->channel_width == BW_40MHZ) { in rsi_load_9116_bootup_params()
1064 u8 prev_bw = common->channel_width; in rsi_band_check()
1075 common->channel_width = BW_20MHZ; in rsi_band_check()
1077 common->channel_width = BW_40MHZ; in rsi_band_check()
1080 if (common->channel_width) in rsi_band_check()
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Drsi_main.h262 u8 channel_width; member
Drsi_mgmt.h405 u8 channel_width; member
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Damdgpu_atomfirmware.c402 mem_channel_width = le32_to_cpu(umc_info->v40.channel_width); in amdgpu_atomfirmware_get_vram_info()
434 mem_channel_width = vram_info->v30.channel_width; in amdgpu_atomfirmware_get_vram_info()
457 mem_channel_width = vram_module->v9.channel_width; in amdgpu_atomfirmware_get_vram_info()
478 mem_channel_width = vram_module->v10.channel_width; in amdgpu_atomfirmware_get_vram_info()
499 mem_channel_width = vram_module->v11.channel_width; in amdgpu_atomfirmware_get_vram_info()
520 mem_channel_width = vram_module->v9.channel_width; in amdgpu_atomfirmware_get_vram_info()
/linux-6.12.1/drivers/net/wireless/intel/iwlwifi/fw/api/
Dstats.h225 struct mvm_statistics_tx_channel_width channel_width; member
231 struct mvm_statistics_tx_channel_width channel_width; member
/linux-6.12.1/drivers/gpu/drm/amd/include/
Datomfirmware.h3208 uint8_t channel_width; member
3229 uint8_t channel_width; // CHANNEL_16BIT/CHANNEL_32BIT/CHANNEL_64BIT member
3290 uint8_t channel_width; member
3352 uint8_t channel_width; // CHANNEL_16BIT/CHANNEL_32BIT/CHANNEL_64BIT member
3392 uint8_t channel_width; // CHANNEL_16BIT/CHANNEL_32BIT/CHANNEL_64BIT member
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/bios/
Dbios_parser2.c2403 info->dram_channel_width_bytes = (1 << info_v23->vram_module[0].channel_width) / 8; in get_vram_info_v23()
2422 info->dram_channel_width_bytes = (1 << info_v24->vram_module[0].channel_width) / 8; in get_vram_info_v24()
2441 info->dram_channel_width_bytes = (1 << info_v25->vram_module[0].channel_width) / 8; in get_vram_info_v25()
2460 info->dram_channel_width_bytes = (1 << info_v30->channel_width) / 8; in get_vram_info_v30()
2479 info->dram_channel_width_bytes = (1 << info_v40->channel_width) / 8; in get_vram_info_from_umc_info_v40()
/linux-6.12.1/net/mac80211/
Dtrace.h508 __field(u32, channel_width)
538 __entry->channel_width = link_conf->chanreq.oper.width;