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Searched refs:cfgBIFPLR4_PCIE_LANE_9_EQUALIZATION_CNTL (Results 1 – 2 of 2) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_7_7_0_offset.h2907 #define cfgBIFPLR4_PCIE_LANE_9_EQUALIZATION_CNTL macro
Dnbio_7_2_0_offset.h3296 #define cfgBIFPLR4_PCIE_LANE_9_EQUALIZATION_CNTL macro