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Searched refs:cache_irq_mask (Results 1 – 2 of 2) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_interrupts.c307 uint32_t cache_irq_mask; in dpu_hw_intr_enable_irq_locked() local
332 cache_irq_mask = intr->cache_irq_mask[reg_idx]; in dpu_hw_intr_enable_irq_locked()
333 if (cache_irq_mask & DPU_IRQ_MASK(irq_idx)) { in dpu_hw_intr_enable_irq_locked()
338 cache_irq_mask |= DPU_IRQ_MASK(irq_idx); in dpu_hw_intr_enable_irq_locked()
342 DPU_REG_WRITE(&intr->hw, reg->en_off, cache_irq_mask); in dpu_hw_intr_enable_irq_locked()
347 intr->cache_irq_mask[reg_idx] = cache_irq_mask; in dpu_hw_intr_enable_irq_locked()
352 DPU_IRQ_MASK(irq_idx), cache_irq_mask); in dpu_hw_intr_enable_irq_locked()
363 uint32_t cache_irq_mask; in dpu_hw_intr_disable_irq_locked() local
384 cache_irq_mask = intr->cache_irq_mask[reg_idx]; in dpu_hw_intr_disable_irq_locked()
385 if ((cache_irq_mask & DPU_IRQ_MASK(irq_idx)) == 0) { in dpu_hw_intr_disable_irq_locked()
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Ddpu_hw_interrupts.h62 u32 cache_irq_mask[MDP_INTR_MAX]; member