/linux-6.12.1/drivers/usb/misc/ |
D | usb3503.c | 49 struct gpio_desc *bypass; member 113 int rst, bypass, conn; in usb3503_switch_mode() local 119 bypass = 0; in usb3503_switch_mode() 124 bypass = 1; in usb3503_switch_mode() 130 bypass = 1; in usb3503_switch_mode() 143 if (hub->bypass) in usb3503_switch_mode() 144 gpiod_set_value_cansleep(hub->bypass, bypass); in usb3503_switch_mode() 261 hub->bypass = devm_gpiod_get_optional(dev, "bypass", GPIOD_OUT_HIGH); in usb3503_probe() 262 if (IS_ERR(hub->bypass)) { in usb3503_probe() 263 err = PTR_ERR(hub->bypass); in usb3503_probe() [all …]
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/linux-6.12.1/drivers/regulator/ |
D | anatop-regulator.c | 30 bool bypass; member 65 sel = anatop_reg->bypass ? LDO_FET_FULL_ON : anatop_reg->sel; in anatop_regmap_enable() 85 if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg)) { in anatop_regmap_core_set_voltage_sel() 100 if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg)) in anatop_regmap_core_get_voltage_sel() 113 WARN_ON(!anatop_reg->bypass); in anatop_regmap_get_bypass() 115 WARN_ON(anatop_reg->bypass); in anatop_regmap_get_bypass() 117 *enable = anatop_reg->bypass; in anatop_regmap_get_bypass() 126 if (enable == anatop_reg->bypass) in anatop_regmap_set_bypass() 130 anatop_reg->bypass = enable; in anatop_regmap_set_bypass() 270 sreg->bypass = true; in anatop_regulator_probe() [all …]
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/linux-6.12.1/drivers/clk/sophgo/ |
D | clk-cv18xx-ip.c | 309 if (cv1800_clk_checkbit(&div->div.common, &div->bypass)) in bypass_div_round_rate() 336 if (cv1800_clk_checkbit(&div->div.common, &div->bypass)) in bypass_div_recalc_rate() 347 if (cv1800_clk_checkbit(&div->div.common, &div->bypass)) in bypass_div_set_rate() 357 if (cv1800_clk_checkbit(&div->div.common, &div->bypass)) in bypass_div_get_parent() 368 return cv1800_clk_clearbit(&div->div.common, &div->bypass); in bypass_div_set_parent() 370 return cv1800_clk_setbit(&div->div.common, &div->bypass); in bypass_div_set_parent() 520 if (cv1800_clk_checkbit(&mux->mux.common, &mux->bypass)) in bypass_mux_round_rate() 547 if (cv1800_clk_checkbit(&mux->mux.common, &mux->bypass)) in bypass_mux_recalc_rate() 558 if (cv1800_clk_checkbit(&mux->mux.common, &mux->bypass)) in bypass_mux_set_rate() 568 if (cv1800_clk_checkbit(&mux->mux.common, &mux->bypass)) in bypass_mux_get_parent() [all …]
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D | clk-cv18xx-ip.h | 32 struct cv1800_clk_regbit bypass; member 44 struct cv1800_clk_regbit bypass; member 52 struct cv1800_clk_regbit bypass; member 123 .bypass = CV1800_CLK_BIT(_bypass_reg, _bypass_shift), \ 143 .bypass = CV1800_CLK_BIT(_bypass_reg, _bypass_shift), \ 186 .bypass = CV1800_CLK_BIT(_bypass_reg, _bypass_shift), \ 218 .bypass = CV1800_CLK_BIT(_bypass_reg, \
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/linux-6.12.1/include/trace/events/ |
D | bcache.h | 124 TP_PROTO(struct bio *bio, bool hit, bool bypass), 125 TP_ARGS(bio, hit, bypass), 133 __field(bool, bypass ) 142 __entry->bypass = bypass; 148 __entry->nr_sector, __entry->cache_hit, __entry->bypass) 153 bool writeback, bool bypass), 154 TP_ARGS(c, inode, bio, writeback, bypass), 163 __field(bool, bypass ) 173 __entry->bypass = bypass; 179 __entry->nr_sector, __entry->writeback, __entry->bypass)
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/linux-6.12.1/arch/arm/mach-omap2/ |
D | sram.h | 12 extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); 25 int bypass); 38 int bypass);
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D | clkt2xxx_dpllcore.c | 114 u32 bypass = 0; in omap2_reprogram_dpllcore() local 162 bypass = 1; in omap2_reprogram_dpllcore() 169 bypass); in omap2_reprogram_dpllcore()
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D | clkt2xxx_virt_prcm_set.c | 100 u32 cur_rate, done_rate, bypass = 0; in omap2_select_table_rate() local 135 bypass = 1; in omap2_select_table_rate() 153 bypass); in omap2_select_table_rate()
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D | sram.c | 242 static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); 244 u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass) in omap2_set_prcm() argument 247 return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass); in omap2_set_prcm()
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/linux-6.12.1/drivers/clk/imx/ |
D | clk-sscg-pll.c | 75 int bypass; member 146 temp_setup->bypass = PLL_BYPASS1; in clk_sscg_divq_lookup() 220 temp_setup->bypass = PLL_BYPASS_NONE; in clk_sscg_divf1_lookup() 280 setup->bypass = PLL_BYPASS2; in clk_sscg_pll_find_setup() 368 val |= FIELD_PREP(SSCG_PLL_BYPASS_MASK, setup->bypass); in clk_sscg_pll_set_rate() 405 val |= FIELD_PREP(SSCG_PLL_BYPASS_MASK, pll->setup.bypass); in clk_sscg_pll_set_parent() 416 int bypass) in __clk_sscg_pll_determine_rate() argument 427 switch (bypass) { in __clk_sscg_pll_determine_rate() 443 rate, bypass); in __clk_sscg_pll_determine_rate()
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/linux-6.12.1/drivers/md/bcache/ |
D | stats.c | 184 bool hit, bool bypass) in mark_cache_stats() argument 186 if (!bypass) in mark_cache_stats() 199 bool hit, bool bypass) in bch_mark_cache_accounting() argument 203 mark_cache_stats(&dc->accounting.collector, hit, bypass); in bch_mark_cache_accounting() 204 mark_cache_stats(&c->accounting.collector, hit, bypass); in bch_mark_cache_accounting()
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/linux-6.12.1/drivers/media/platform/nxp/imx8-isi/ |
D | imx8-isi-hw.c | 122 bool *bypass) in mxc_isi_channel_set_scaling() argument 165 *bypass = in_size->height == out_size->height && in mxc_isi_channel_set_scaling() 211 bool *bypass) in mxc_isi_channel_set_csc() argument 254 *bypass = !coeffs; in mxc_isi_channel_set_csc() 304 bool bypass) in mxc_isi_channel_set_control() argument 319 if (bypass) in mxc_isi_channel_set_control() 538 mxc_isi_pipe_irq_t irq_handler, bool bypass) in mxc_isi_channel_acquire() argument 556 | (!bypass ? MXC_ISI_CHANNEL_RES_LINE_BUF : 0); in mxc_isi_channel_acquire() 590 int mxc_isi_channel_chain(struct mxc_isi_pipe *pipe, bool bypass) in mxc_isi_channel_chain() argument
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/linux-6.12.1/drivers/clk/at91/ |
D | sckc.c | 122 bool bypass, in at91_clk_register_slow_osc() argument 148 if (bypass) in at91_clk_register_slow_osc() 378 bool bypass; in at91sam9x5_sckc_register() local 398 bypass = of_property_read_bool(child, "atmel,osc-bypass"); in at91sam9x5_sckc_register() 402 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in at91sam9x5_sckc_register() 411 &parent_data, 1200000, bypass, bits); in at91sam9x5_sckc_register() 479 bool bypass; in of_sam9x60_sckc_setup() local 496 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in of_sam9x60_sckc_setup() 498 &parent_data, 5000000, bypass, in of_sam9x60_sckc_setup()
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D | at91rm9200.c | 86 bool bypass; in at91rm9200_pmc_setup() local 109 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in at91rm9200_pmc_setup() 112 bypass); in at91rm9200_pmc_setup()
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D | at91sam9g45.c | 101 bool bypass; in at91sam9g45_pmc_setup() local 124 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in at91sam9g45_pmc_setup() 127 bypass); in at91sam9g45_pmc_setup()
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/linux-6.12.1/Documentation/ABI/testing/ |
D | sysfs-bus-i2c-devices-bq32k | 5 Description: Attribute for enable/disable the trickle charge bypass 7 enable/disable the Trickle charge FET bypass.
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D | sysfs-bus-iio-filter-admv8818 | 10 - bypass -> bypass low pass filter, high pass filter and disable/unregister
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/linux-6.12.1/drivers/clk/socfpga/ |
D | clk-pll.c | 44 unsigned long bypass; in clk_pll_recalc_rate() local 47 bypass = readl(clk_mgr_base_addr + CLKMGR_BYPASS); in clk_pll_recalc_rate() 48 if (bypass & MAINPLL_BYPASS) in clk_pll_recalc_rate()
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/linux-6.12.1/Documentation/devicetree/bindings/clock/ti/ |
D | dpll.txt | 5 (reference clock and bypass clock), with digital phase locked 36 and second entry bypass clock 55 - ti,low-power-bypass : DPLL output matches rate of parent bypass clock 79 ti,low-power-bypass;
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D | fapll.txt | 5 (reference clock and bypass clock), and one or more child 13 - clocks : link phandles of parent clocks (clk-ref and clk-bypass)
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/linux-6.12.1/arch/mips/include/asm/octeon/ |
D | cvmx-asxx-defs.h | 200 uint64_t bypass:1; member 202 uint64_t bypass:1; 469 uint64_t bypass:1; member 475 uint64_t bypass:1; 493 uint64_t bypass:1; member 503 uint64_t bypass:1;
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/linux-6.12.1/drivers/power/supply/ |
D | bq25980_charger.c | 31 bool bypass; member 306 if (bq->state.bypass) in bq25980_set_input_curr_lim() 328 if (bq->state.bypass) { in bq25980_get_input_volt_lim() 350 if (bq->state.bypass) { in bq25980_set_input_volt_lim() 454 bq->state.bypass = en_bypass; in bq25980_set_bypass() 456 return bq->state.bypass; in bq25980_set_bypass() 604 state->bypass = chg_ctrl_2 & BQ25980_EN_BYPASS; in bq25980_get_state() 766 else if (state.bypass) in bq25980_get_charger_property() 768 else if (!state.bypass) in bq25980_get_charger_property() 828 old_state.bypass != new_state->bypass); in bq25980_state_changed() [all …]
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/linux-6.12.1/drivers/pwm/ |
D | pwm-sun4i.c | 172 bool *bypass) in sun4i_pwm_calculate() argument 179 *bypass = sun4ichip->data->has_direct_mod_clk_output && in sun4i_pwm_calculate() 186 if (*bypass) in sun4i_pwm_calculate() 240 bool bypass; in sun4i_pwm_apply() local 253 &bypass); in sun4i_pwm_apply() 265 if (bypass) { in sun4i_pwm_apply()
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/linux-6.12.1/net/sched/ |
D | sch_fifo.c | 100 bool bypass; in __fifo_init() local 120 bypass = sch->limit >= psched_mtu(qdisc_dev(sch)); in __fifo_init() 122 bypass = sch->limit >= 1; in __fifo_init() 124 if (bypass) in __fifo_init()
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/linux-6.12.1/arch/mips/cavium-octeon/executive/ |
D | cvmx-helper-jtag.c | 66 jtgc.s.bypass = 0x3; in cvmx_helper_qlm_jtag_init() 68 jtgc.s.bypass = 0xf; in cvmx_helper_qlm_jtag_init()
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