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Searched refs:bit_mask (Results 1 – 25 of 84) sorted by relevance

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/linux-6.12.1/drivers/net/ethernet/altera/ !
Daltera_utils.c9 void tse_set_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask) in tse_set_bit() argument
12 value |= bit_mask; in tse_set_bit()
16 void tse_clear_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask) in tse_clear_bit() argument
19 value &= ~bit_mask; in tse_clear_bit()
23 int tse_bit_is_set(void __iomem *ioaddr, size_t offs, u32 bit_mask) in tse_bit_is_set() argument
26 return (value & bit_mask) ? 1 : 0; in tse_bit_is_set()
29 int tse_bit_is_clear(void __iomem *ioaddr, size_t offs, u32 bit_mask) in tse_bit_is_clear() argument
32 return (value & bit_mask) ? 0 : 1; in tse_bit_is_clear()
Daltera_utils.h12 void tse_set_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask);
13 void tse_clear_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask);
14 int tse_bit_is_set(void __iomem *ioaddr, size_t offs, u32 bit_mask);
15 int tse_bit_is_clear(void __iomem *ioaddr, size_t offs, u32 bit_mask);
/linux-6.12.1/drivers/net/ethernet/mellanox/mlx5/core/steering/ !
Ddr_ste_v0.c705 bool inner, u8 *bit_mask) in dr_ste_v0_build_eth_l2_src_dst_bit_mask() argument
709 DR_STE_SET_TAG(eth_l2_src_dst, bit_mask, dmac_47_16, mask, dmac_47_16); in dr_ste_v0_build_eth_l2_src_dst_bit_mask()
710 DR_STE_SET_TAG(eth_l2_src_dst, bit_mask, dmac_15_0, mask, dmac_15_0); in dr_ste_v0_build_eth_l2_src_dst_bit_mask()
713 MLX5_SET(ste_eth_l2_src_dst, bit_mask, smac_47_32, in dr_ste_v0_build_eth_l2_src_dst_bit_mask()
715 MLX5_SET(ste_eth_l2_src_dst, bit_mask, smac_31_0, in dr_ste_v0_build_eth_l2_src_dst_bit_mask()
721 DR_STE_SET_TAG(eth_l2_src_dst, bit_mask, first_vlan_id, mask, first_vid); in dr_ste_v0_build_eth_l2_src_dst_bit_mask()
722 DR_STE_SET_TAG(eth_l2_src_dst, bit_mask, first_cfi, mask, first_cfi); in dr_ste_v0_build_eth_l2_src_dst_bit_mask()
723 DR_STE_SET_TAG(eth_l2_src_dst, bit_mask, first_priority, mask, first_prio); in dr_ste_v0_build_eth_l2_src_dst_bit_mask()
724 DR_STE_SET_ONES(eth_l2_src_dst, bit_mask, l3_type, mask, ip_version); in dr_ste_v0_build_eth_l2_src_dst_bit_mask()
727 MLX5_SET(ste_eth_l2_src_dst, bit_mask, first_vlan_qualifier, -1); in dr_ste_v0_build_eth_l2_src_dst_bit_mask()
[all …]
Ddr_ste_v1.c1102 bool inner, u8 *bit_mask) in dr_ste_v1_build_eth_l2_src_dst_bit_mask() argument
1106 DR_STE_SET_TAG(eth_l2_src_dst_v1, bit_mask, dmac_47_16, mask, dmac_47_16); in dr_ste_v1_build_eth_l2_src_dst_bit_mask()
1107 DR_STE_SET_TAG(eth_l2_src_dst_v1, bit_mask, dmac_15_0, mask, dmac_15_0); in dr_ste_v1_build_eth_l2_src_dst_bit_mask()
1109 DR_STE_SET_TAG(eth_l2_src_dst_v1, bit_mask, smac_47_16, mask, smac_47_16); in dr_ste_v1_build_eth_l2_src_dst_bit_mask()
1110 DR_STE_SET_TAG(eth_l2_src_dst_v1, bit_mask, smac_15_0, mask, smac_15_0); in dr_ste_v1_build_eth_l2_src_dst_bit_mask()
1112 DR_STE_SET_TAG(eth_l2_src_dst_v1, bit_mask, first_vlan_id, mask, first_vid); in dr_ste_v1_build_eth_l2_src_dst_bit_mask()
1113 DR_STE_SET_TAG(eth_l2_src_dst_v1, bit_mask, first_cfi, mask, first_cfi); in dr_ste_v1_build_eth_l2_src_dst_bit_mask()
1114 DR_STE_SET_TAG(eth_l2_src_dst_v1, bit_mask, first_priority, mask, first_prio); in dr_ste_v1_build_eth_l2_src_dst_bit_mask()
1115 DR_STE_SET_ONES(eth_l2_src_dst_v1, bit_mask, l3_type, mask, ip_version); in dr_ste_v1_build_eth_l2_src_dst_bit_mask()
1118 MLX5_SET(ste_eth_l2_src_dst_v1, bit_mask, first_vlan_qualifier, -1); in dr_ste_v1_build_eth_l2_src_dst_bit_mask()
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/linux-6.12.1/drivers/video/fbdev/core/ !
Dcfbimgblt.c221 u32 bit_mask, eorx, shift; in fast_imageblit() local
253 bit_mask = (1 << ppw) - 1; in fast_imageblit()
273 FB_WRITEL(colortab[(*src >> 4) & bit_mask], dst++); in fast_imageblit()
274 FB_WRITEL(colortab[(*src >> 0) & bit_mask], dst++); in fast_imageblit()
279 FB_WRITEL(colortab[(*src >> 6) & bit_mask], dst++); in fast_imageblit()
280 FB_WRITEL(colortab[(*src >> 4) & bit_mask], dst++); in fast_imageblit()
281 FB_WRITEL(colortab[(*src >> 2) & bit_mask], dst++); in fast_imageblit()
282 FB_WRITEL(colortab[(*src >> 0) & bit_mask], dst++); in fast_imageblit()
287 FB_WRITEL(colortab[(*src >> 7) & bit_mask], dst++); in fast_imageblit()
288 FB_WRITEL(colortab[(*src >> 6) & bit_mask], dst++); in fast_imageblit()
[all …]
Dsysimgblt.c191 u32 bit_mask, eorx, shift; in fast_imageblit() local
223 bit_mask = (1 << ppw) - 1; in fast_imageblit()
243 *dst++ = colortab[(*src >> 4) & bit_mask]; in fast_imageblit()
244 *dst++ = colortab[(*src >> 0) & bit_mask]; in fast_imageblit()
249 *dst++ = colortab[(*src >> 6) & bit_mask]; in fast_imageblit()
250 *dst++ = colortab[(*src >> 4) & bit_mask]; in fast_imageblit()
251 *dst++ = colortab[(*src >> 2) & bit_mask]; in fast_imageblit()
252 *dst++ = colortab[(*src >> 0) & bit_mask]; in fast_imageblit()
257 *dst++ = colortab[(*src >> 7) & bit_mask]; in fast_imageblit()
258 *dst++ = colortab[(*src >> 6) & bit_mask]; in fast_imageblit()
[all …]
/linux-6.12.1/drivers/net/ethernet/freescale/fman/ !
Dfman_tgec.c261 u32 bit_mask; in get_exception_flag() local
265 bit_mask = TGEC_IMASK_MDIO_SCAN_EVENT; in get_exception_flag()
268 bit_mask = TGEC_IMASK_MDIO_CMD_CMPL; in get_exception_flag()
271 bit_mask = TGEC_IMASK_REM_FAULT; in get_exception_flag()
274 bit_mask = TGEC_IMASK_LOC_FAULT; in get_exception_flag()
277 bit_mask = TGEC_IMASK_TX_ECC_ER; in get_exception_flag()
280 bit_mask = TGEC_IMASK_TX_FIFO_UNFL; in get_exception_flag()
283 bit_mask = TGEC_IMASK_TX_FIFO_OVFL; in get_exception_flag()
286 bit_mask = TGEC_IMASK_TX_ER; in get_exception_flag()
289 bit_mask = TGEC_IMASK_RX_FIFO_OVFL; in get_exception_flag()
[all …]
Dfman_dtsec.c463 u32 bit_mask = 0x80000000 >> bit_idx; in set_bucket() local
472 iowrite32be(ioread32be(reg) | bit_mask, reg); in set_bucket()
474 iowrite32be(ioread32be(reg) & (~bit_mask), reg); in set_bucket()
524 u32 bit_mask; in get_exception_flag() local
528 bit_mask = DTSEC_IMASK_BREN; in get_exception_flag()
531 bit_mask = DTSEC_IMASK_RXCEN; in get_exception_flag()
534 bit_mask = DTSEC_IMASK_GTSCEN; in get_exception_flag()
537 bit_mask = DTSEC_IMASK_BTEN; in get_exception_flag()
540 bit_mask = DTSEC_IMASK_TXCEN; in get_exception_flag()
543 bit_mask = DTSEC_IMASK_TXEEN; in get_exception_flag()
[all …]
Dfman_memac.c437 u32 bit_mask; in get_exception_flag() local
441 bit_mask = MEMAC_IMASK_TECC_ER; in get_exception_flag()
444 bit_mask = MEMAC_IMASK_RECC_ER; in get_exception_flag()
447 bit_mask = MEMAC_IMASK_TSECC_ER; in get_exception_flag()
450 bit_mask = MEMAC_IMASK_MGI; in get_exception_flag()
453 bit_mask = 0; in get_exception_flag()
457 return bit_mask; in get_exception_flag()
883 u32 bit_mask = 0; in memac_set_exception() local
885 bit_mask = get_exception_flag(exception); in memac_set_exception()
886 if (bit_mask) { in memac_set_exception()
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/linux-6.12.1/arch/arm/mach-socfpga/ !
Docram.c65 static inline void ecc_set_bits(u32 bit_mask, void __iomem *ioaddr) in ecc_set_bits() argument
69 value |= bit_mask; in ecc_set_bits()
73 static inline void ecc_clear_bits(u32 bit_mask, void __iomem *ioaddr) in ecc_clear_bits() argument
77 value &= ~bit_mask; in ecc_clear_bits()
81 static inline int ecc_test_bits(u32 bit_mask, void __iomem *ioaddr) in ecc_test_bits() argument
85 return (value & bit_mask) ? 1 : 0; in ecc_test_bits()
/linux-6.12.1/drivers/net/wireless/ralink/rt2x00/ !
Drt2x00reg.h149 u8 bit_mask; member
154 u16 bit_mask; member
159 u32 bit_mask; member
238 *(__reg) &= ~((__field).bit_mask); \
241 ((__field).bit_mask); \
247 ((__reg) & ((__field).bit_mask)) >> \
/linux-6.12.1/drivers/mfd/ !
Dadp5520.c72 uint8_t bit_mask) in __adp5520_ack_bits() argument
83 reg_val |= bit_mask; in __adp5520_ack_bits()
103 int adp5520_set_bits(struct device *dev, int reg, uint8_t bit_mask) in adp5520_set_bits() argument
113 if (!ret && ((reg_val & bit_mask) != bit_mask)) { in adp5520_set_bits()
114 reg_val |= bit_mask; in adp5520_set_bits()
123 int adp5520_clr_bits(struct device *dev, int reg, uint8_t bit_mask) in adp5520_clr_bits() argument
133 if (!ret && (reg_val & bit_mask)) { in adp5520_clr_bits()
134 reg_val &= ~bit_mask; in adp5520_clr_bits()
Dda903x.c170 int da903x_set_bits(struct device *dev, int reg, uint8_t bit_mask) in da903x_set_bits() argument
182 if ((reg_val & bit_mask) != bit_mask) { in da903x_set_bits()
183 reg_val |= bit_mask; in da903x_set_bits()
192 int da903x_clr_bits(struct device *dev, int reg, uint8_t bit_mask) in da903x_clr_bits() argument
204 if (reg_val & bit_mask) { in da903x_clr_bits()
205 reg_val &= ~bit_mask; in da903x_clr_bits()
/linux-6.12.1/drivers/staging/most/dim2/ !
Dhal.c53 static inline u32 bit_mask(u8 position) in bit_mask() function
161 u32 const cmd = bit_mask(MADR_WNR_BIT) | bit_mask(MADR_TB_BIT); in dim2_clear_dbr()
197 dim2_transfer_madr(bit_mask(MADR_WNR_BIT) | ctr_addr); in dim2_write_ctr_mask()
306 bit_mask(ADT1_PS_BIT + shift) | in dim2_start_ctrl_async()
307 bit_mask(ADT1_RDY_BIT + shift) | in dim2_start_ctrl_async()
329 bit_mask(ADT1_RDY_BIT + shift) | in dim2_start_isoc_sync()
359 writel(readl(&g.dim2->ACMR0) | bit_mask(ch_addr), &g.dim2->ACMR0); in dim2_configure_channel()
365 writel(readl(&g.dim2->ACMR0) & ~bit_mask(ch_addr), &g.dim2->ACMR0); in dim2_clear_channel()
374 writel(bit_mask(ch_addr), &g.dim2->ACSR0); in dim2_clear_channel()
550 writel(bit_mask(HCTL_EN_BIT), &g.dim2->HCTL); in dim2_initialize()
[all …]
/linux-6.12.1/drivers/hid/ !
Dhid-prodikeys.c298 u32 bit_mask; in pcmidi_handle_report1() local
300 bit_mask = data[1]; in pcmidi_handle_report1()
301 bit_mask = (bit_mask << 8) | data[2]; in pcmidi_handle_report1()
302 bit_mask = (bit_mask << 8) | data[3]; in pcmidi_handle_report1()
307 if (pm->midi_mode && bit_mask == 0x004000) { in pcmidi_handle_report1()
317 else if (pm->midi_mode && bit_mask == 0x000004) { in pcmidi_handle_report1()
374 u32 bit_mask; in pcmidi_handle_report4() local
377 bit_mask = data[1]; in pcmidi_handle_report4()
378 bit_mask = (bit_mask << 8) | data[2]; in pcmidi_handle_report4()
379 bit_mask = (bit_mask << 8) | data[3]; in pcmidi_handle_report4()
[all …]
/linux-6.12.1/drivers/clk/bcm/ !
Dclk-iproc-pll.c188 val |= bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift; in __pll_disable()
199 val &= ~(bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift); in __pll_disable()
211 val &= ~(bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift); in __pll_enable()
218 val |= bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift; in __pll_enable()
256 val &= ~(bit_mask(dig_filter->ki_width) << dig_filter->ki_shift | in __pll_bring_out_reset()
257 bit_mask(dig_filter->kp_width) << dig_filter->kp_shift | in __pll_bring_out_reset()
258 bit_mask(dig_filter->ka_width) << dig_filter->ka_shift); in __pll_bring_out_reset()
291 bit_mask(ctrl->ndiv_int.width); in pll_fractional_change_only()
297 pdiv = (val >> ctrl->pdiv.shift) & bit_mask(ctrl->pdiv.width); in pll_fractional_change_only()
358 val &= ~(bit_mask(ctrl->ndiv_frac.width) << in pll_set_rate()
[all …]
Dclk-iproc-asiu.c89 div_h = (val >> clk->div.high_shift) & bit_mask(clk->div.high_width); in iproc_asiu_clk_recalc_rate()
91 div_l = (val >> clk->div.low_shift) & bit_mask(clk->div.low_width); in iproc_asiu_clk_recalc_rate()
149 val &= ~(bit_mask(clk->div.high_width) in iproc_asiu_clk_set_rate()
153 val &= ~(bit_mask(clk->div.high_width) in iproc_asiu_clk_set_rate()
157 val &= ~(bit_mask(clk->div.low_width) << clk->div.low_shift); in iproc_asiu_clk_set_rate()
160 val &= ~(bit_mask(clk->div.low_width) << clk->div.low_shift); in iproc_asiu_clk_set_rate()
/linux-6.12.1/drivers/staging/media/starfive/camss/ !
Dstf-camss.h118 u32 reg, u32 bit_mask) in stf_syscon_reg_set_bit() argument
123 iowrite32(value | bit_mask, stfcamss->syscon_base + reg); in stf_syscon_reg_set_bit()
127 u32 reg, u32 bit_mask) in stf_syscon_reg_clear_bit() argument
132 iowrite32(value & ~bit_mask, stfcamss->syscon_base + reg); in stf_syscon_reg_clear_bit()
/linux-6.12.1/include/linux/mfd/ !
Drc5t583.h344 unsigned int bit_mask) in rc5t583_set_bits() argument
347 return regmap_update_bits(rc5t583->regmap, reg, bit_mask, bit_mask); in rc5t583_set_bits()
351 unsigned int bit_mask) in rc5t583_clear_bits() argument
354 return regmap_update_bits(rc5t583->regmap, reg, bit_mask, 0); in rc5t583_clear_bits()
/linux-6.12.1/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/ !
Dmlx5hws_definer.c124 (fc)->bit_mask = __mlx5_mask(definer_hl, d_hdr); \
166 HWS_SET32(tag, -1, fc->byte_off, fc->bit_off, fc->bit_mask); in hws_definer_ones_set()
177 HWS_SET32(tag, val, fc->byte_off, fc->bit_off, fc->bit_mask); in hws_definer_generic_set()
186 HWS_SET32(tag, STE_CVLAN, fc->byte_off, fc->bit_off, fc->bit_mask); in hws_definer_outer_vlan_type_set()
188 HWS_SET32(tag, STE_SVLAN, fc->byte_off, fc->bit_off, fc->bit_mask); in hws_definer_outer_vlan_type_set()
190 HWS_SET32(tag, STE_NO_VLAN, fc->byte_off, fc->bit_off, fc->bit_mask); in hws_definer_outer_vlan_type_set()
199 HWS_SET32(tag, STE_CVLAN, fc->byte_off, fc->bit_off, fc->bit_mask); in hws_definer_inner_vlan_type_set()
201 HWS_SET32(tag, STE_SVLAN, fc->byte_off, fc->bit_off, fc->bit_mask); in hws_definer_inner_vlan_type_set()
203 HWS_SET32(tag, STE_NO_VLAN, fc->byte_off, fc->bit_off, fc->bit_mask); in hws_definer_inner_vlan_type_set()
220 HWS_SET32(tag, STE_CVLAN, fc->byte_off, fc->bit_off, fc->bit_mask); in hws_definer_second_vlan_type_set()
[all …]
/linux-6.12.1/drivers/platform/x86/intel/pmc/ !
Dcore.c237 data & map->bit_mask ? "Yes" : "No"); in pmc_core_slps0_display()
241 data & map->bit_mask ? "Yes" : "No"); in pmc_core_slps0_display()
264 u32 bit_mask, *lpm_regs; in pmc_core_lpm_display() local
284 bit_mask = maps[idx][index].bit_mask; in pmc_core_lpm_display()
288 lpm_regs[idx] & bit_mask ? 1 : 0); in pmc_core_lpm_display()
292 lpm_regs[idx] & bit_mask ? 1 : 0); in pmc_core_lpm_display()
311 pf_map[idx][index].bit_mask & pf_reg ? "Off" : "On"); in pmc_core_display_map()
412 map[index].bit_mask & val_low ? "Not power gated" : in pmc_core_mphy_pg_show()
419 map[index].bit_mask & val_high ? "Not power gated" : in pmc_core_mphy_pg_show()
455 map[index].bit_mask & val ? "Active" : "Idle"); in pmc_core_pll_show()
[all …]
/linux-6.12.1/drivers/irqchip/ !
Dirq-starfive-jh8100-intc.c36 u32 reg, u32 bit_mask) in starfive_intc_bit_set() argument
41 value |= bit_mask; in starfive_intc_bit_set()
46 u32 reg, u32 bit_mask) in starfive_intc_bit_clear() argument
51 value &= ~bit_mask; in starfive_intc_bit_clear()
/linux-6.12.1/drivers/staging/vt6655/ !
Dmac.c40 void vt6655_mac_reg_bits_on(void __iomem *iobase, const u8 reg_offset, const u8 bit_mask) in vt6655_mac_reg_bits_on() argument
45 iowrite8(reg_value | bit_mask, iobase + reg_offset); in vt6655_mac_reg_bits_on()
48 void vt6655_mac_word_reg_bits_on(void __iomem *iobase, const u8 reg_offset, const u16 bit_mask) in vt6655_mac_word_reg_bits_on() argument
53 iowrite16(reg_value | (bit_mask), iobase + reg_offset); in vt6655_mac_word_reg_bits_on()
56 void vt6655_mac_reg_bits_off(void __iomem *iobase, const u8 reg_offset, const u8 bit_mask) in vt6655_mac_reg_bits_off() argument
61 iowrite8(reg_value & ~(bit_mask), iobase + reg_offset); in vt6655_mac_reg_bits_off()
64 void vt6655_mac_word_reg_bits_off(void __iomem *iobase, const u8 reg_offset, const u16 bit_mask) in vt6655_mac_word_reg_bits_off() argument
69 iowrite16(reg_value & ~(bit_mask), iobase + reg_offset); in vt6655_mac_word_reg_bits_off()
/linux-6.12.1/drivers/platform/x86/ !
Dpmc_atom.c25 u32 bit_mask; member
268 fd_map[index].bit_mask & fd ? "Disabled" : "Enabled ", in pmc_dev_state_print()
269 sts_map[index].bit_mask & sts ? "D3" : "D0"); in pmc_dev_state_print()
306 map[index].bit_mask & pss ? "Off" : "On"); in pmc_pss_state_show()
461 if (!(fd_map[index].bit_mask & fd) && in pmc_dev_state_check()
462 !(sts_map[index].bit_mask & sts)) { in pmc_dev_state_check()
463 if (sts_map[index].bit_mask & sts_possible_false_pos) in pmc_dev_state_check()
/linux-6.12.1/include/linux/mfd/da9055/ !
Dcore.h68 unsigned char bit_mask, in da9055_reg_update() argument
71 return regmap_update_bits(da9055->regmap, reg, bit_mask, reg_val); in da9055_reg_update()

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