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Searched refs:base_clock (Results 1 – 7 of 7) sorted by relevance

/linux-6.12.1/drivers/clk/
Dclk-nspire.c34 u32 base_clock; member
44 clk->base_clock = 48 * MHZ; in nspire_clkinfo_cx()
46 clk->base_clock = 6 * EXTRACT(val, CX_BASE) * MHZ; in nspire_clkinfo_cx()
55 clk->base_clock = 27 * MHZ; in nspire_clkinfo_classic()
57 clk->base_clock = (300 - 6 * EXTRACT(val, CLASSIC_BASE)) * MHZ; in nspire_clkinfo_classic()
125 info.base_clock); in nspire_clk_setup()
132 info.base_clock / MHZ, in nspire_clk_setup()
133 info.base_clock / info.base_cpu_ratio / MHZ, in nspire_clk_setup()
134 info.base_clock / info.base_ahb_ratio / MHZ); in nspire_clk_setup()
/linux-6.12.1/drivers/misc/genwqe/
Dcard_sysfs.c124 u64 base_clock; in base_clock_show() local
127 base_clock = genwqe_base_clock_frequency(cd); in base_clock_show()
128 return sprintf(buf, "%lld\n", base_clock); in base_clock_show()
130 static DEVICE_ATTR_RO(base_clock);
/linux-6.12.1/drivers/comedi/drivers/
Dni_atmio16d.c290 unsigned int timer, base_clock; in atmio16d_ai_cmd() local
328 base_clock = CLOCK_1_MHZ; in atmio16d_ai_cmd()
331 base_clock = CLOCK_100_KHZ; in atmio16d_ai_cmd()
334 base_clock = CLOCK_10_KHZ; in atmio16d_ai_cmd()
338 outw(base_clock, dev->iobase + AM9513A_DATA_REG); in atmio16d_ai_cmd()
394 base_clock = CLOCK_1_MHZ; in atmio16d_ai_cmd()
397 base_clock = CLOCK_100_KHZ; in atmio16d_ai_cmd()
400 base_clock = CLOCK_10_KHZ; in atmio16d_ai_cmd()
404 outw(base_clock, dev->iobase + AM9513A_DATA_REG); in atmio16d_ai_cmd()
/linux-6.12.1/drivers/mmc/host/
Dmvsdio.c46 unsigned int base_clock; member
613 u32 m = DIV_ROUND_UP(host->base_clock, ios->clock) - 1; in mvsd_set_ios()
618 host->ns_per_clk = 1000000000 / (host->base_clock / (m+1)); in mvsd_set_ios()
620 ios->clock, host->base_clock / (m+1), m); in mvsd_set_ios()
738 mmc->f_min = DIV_ROUND_UP(host->base_clock, MVSD_BASE_DIV_MAX); in mvsd_probe()
748 host->base_clock = clk_get_rate(host->clk) / 2; in mvsd_probe()
/linux-6.12.1/Documentation/ABI/testing/
Dsysfs-driver-genwqe63 What: /sys/class/genwqe/genwqe<n>_card/base_clock
/linux-6.12.1/drivers/hwmon/
Dw83795.c283 unsigned long base_clock; in pwm_freq_from_reg() local
286 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256); in pwm_freq_from_reg()
287 return base_clock / ((reg & 0x7f) + 1); in pwm_freq_from_reg()
294 unsigned long base_clock; in pwm_freq_to_reg() local
306 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256); in pwm_freq_to_reg()
307 reg1 = clamp_val(DIV_ROUND_CLOSEST(base_clock, val), 1, 128); in pwm_freq_to_reg()
308 best1 = base_clock / reg1; in pwm_freq_to_reg()
/linux-6.12.1/drivers/tty/
Dsynclink_gt.c272 unsigned int base_clock; member
1098 info->base_clock = tmp_params.clock_speed; in set_params32()
2538 info->base_clock = tmp_params.clock_speed; in set_params()
3490 info->base_clock = 14745600; in alloc_dev()
3831 unsigned int osc = info->base_clock; in set_rate()
4124 ((info->base_clock < (info->params.data_rate * 16)) || in async_mode()
4125 (info->base_clock % (info->params.data_rate * 16)))) { in async_mode()