| /linux-6.12.1/drivers/mfd/ |
| D | mt6370.c | 187 u8 bank_idx, bank_addr; in mt6370_regmap_read() local
190 bank_idx = u8_buf[0]; in mt6370_regmap_read()
193 ret = i2c_smbus_read_i2c_block_data(info->i2c[bank_idx], bank_addr, in mt6370_regmap_read()
208 u8 bank_idx, bank_addr; in mt6370_regmap_write() local
211 bank_idx = u8_buf[0]; in mt6370_regmap_write()
214 return i2c_smbus_write_i2c_block_data(info->i2c[bank_idx], bank_addr, in mt6370_regmap_write()
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| /linux-6.12.1/drivers/clk/ |
| D | clk-versaclock7.c | 370 unsigned int bank_idx, in vc7_get_bank_clk() argument
375 if (bank_idx == 0 || bank_idx == 1) { in vc7_get_bank_clk()
396 } else if (bank_idx == 2) { in vc7_get_bank_clk()
413 } else if (bank_idx == 3) { in vc7_get_bank_clk()
430 } else if (bank_idx == 4) { in vc7_get_bank_clk()
453 } else if (bank_idx == 5) { in vc7_get_bank_clk()
483 } else if (bank_idx == 6) { in vc7_get_bank_clk()
512 pr_warn("bank_src%d = %d is not supported\n", bank_idx, output_bank_src); in vc7_get_bank_clk()
1101 unsigned int i, val, bank_idx, out_num; in vc7_probe() local
1184 bank_idx = output_bank_mapping[out_num]; in vc7_probe()
[all …]
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| /linux-6.12.1/security/integrity/ima/ |
| D | ima_crypto.c | 843 int rc, i, bank_idx = -1; in ima_calc_boot_aggregate() local
848 bank_idx = i; in ima_calc_boot_aggregate()
853 bank_idx = i; in ima_calc_boot_aggregate()
855 if (bank_idx == -1 && crypto_id == HASH_ALGO_SHA1) in ima_calc_boot_aggregate()
856 bank_idx = i; in ima_calc_boot_aggregate()
859 if (bank_idx == -1) { in ima_calc_boot_aggregate()
864 hash->algo = ima_tpm_chip->allocated_banks[bank_idx].crypto_id; in ima_calc_boot_aggregate()
871 alg_id = ima_tpm_chip->allocated_banks[bank_idx].alg_id; in ima_calc_boot_aggregate()
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| /linux-6.12.1/drivers/crypto/intel/qat/qat_common/ |
| D | adf_gen4_hw_data.c | 408 u32 bank_idx, int timeout_ms) in adf_gen4_bank_quiesce_coal_timer() argument
422 int_col_ctl = csr_ops->read_csr_int_col_ctl(csr_etr, bank_idx); in adf_gen4_bank_quiesce_coal_timer()
427 int_col_en = csr_ops->read_csr_int_col_en(csr_etr, bank_idx); in adf_gen4_bank_quiesce_coal_timer()
430 e_stat = csr_ops->read_csr_e_stat(csr_etr, bank_idx); in adf_gen4_bank_quiesce_coal_timer()
439 bank_idx, wait_us, timeout_ms, e_stat, int_col_en); in adf_gen4_bank_quiesce_coal_timer()
443 csr_misc, ADF_WQM_CSR_RPINTSOU(bank_idx)); in adf_gen4_bank_quiesce_coal_timer()
447 bank_idx, wait_us); in adf_gen4_bank_quiesce_coal_timer()
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| D | adf_gen4_hw_data.h | 173 u32 bank_idx, int timeout_ms);
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| /linux-6.12.1/drivers/irqchip/ |
| D | irq-stm32-exti.c | 310 u32 bank_idx, in stm32_exti_chip_init() argument
317 stm32_bank = h_data->drv_data->exti_banks[bank_idx]; in stm32_exti_chip_init()
318 chip_data = &h_data->chips_data[bank_idx]; in stm32_exti_chip_init()
329 pr_info("%pOF: bank%d\n", node, bank_idx); in stm32_exti_chip_init()
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| D | irq-stm32mp-exti.c | 561 u32 bank_idx, struct device_node *node) in stm32mp_exti_chip_init() argument
567 bank = h_data->drv_data->exti_banks[bank_idx]; in stm32mp_exti_chip_init()
568 chip_data = &h_data->chips_data[bank_idx]; in stm32mp_exti_chip_init()
583 pr_info("%pOF: bank%d\n", node, bank_idx); in stm32mp_exti_chip_init()
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| /linux-6.12.1/drivers/gpu/drm/i915/display/ |
| D | intel_dkl_phy_regs.h | 13 u32 bank_idx:4; member
43 .bank_idx = _DKL_REG_BANK_IDX(phy_offset), \
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| D | intel_dkl_phy.c | 31 HIP_INDEX_VAL(tc_port, reg.bank_idx)); in dkl_phy_set_hip_idx()
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| /linux-6.12.1/drivers/soc/mediatek/ |
| D | mtk-svs.c | 1212 unsigned int bank_idx, in svs_set_bank_phase() argument
1215 struct svs_bank *svsb = &svsp->banks[bank_idx]; in svs_set_bank_phase()
1280 unsigned short bank_idx, in svs_save_bank_register_data() argument
1283 struct svs_bank *svsb = &svsp->banks[bank_idx]; in svs_save_bank_register_data()
1291 unsigned short bank_idx) in svs_error_isr_handler() argument
1293 struct svs_bank *svsb = &svsp->banks[bank_idx]; in svs_error_isr_handler()
1305 svs_save_bank_register_data(svsp, bank_idx, SVSB_PHASE_ERROR); in svs_error_isr_handler()
1313 unsigned short bank_idx) in svs_init01_isr_handler() argument
1315 struct svs_bank *svsb = &svsp->banks[bank_idx]; in svs_init01_isr_handler()
1323 svs_save_bank_register_data(svsp, bank_idx, SVSB_PHASE_INIT01); in svs_init01_isr_handler()
[all …]
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| /linux-6.12.1/include/linux/habanalabs/ |
| D | cpucp_if.h | 1316 __u8 bank_idx; member
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