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Searched refs:__ASM_STR (Results 1 – 4 of 4) sorted by relevance

/linux-6.12.1/arch/riscv/include/asm/
Dasm.h10 #define __ASM_STR(x) x
12 #define __ASM_STR(x) #x macro
16 #define __REG_SEL(a, b) __ASM_STR(a)
18 #define __REG_SEL(a, b) __ASM_STR(b)
56 #define RISCV_INT __ASM_STR(.word)
57 #define RISCV_SZINT __ASM_STR(4)
58 #define RISCV_LGINT __ASM_STR(2)
64 #define RISCV_SHORT __ASM_STR(.half)
65 #define RISCV_SZSHORT __ASM_STR(2)
66 #define RISCV_LGSHORT __ASM_STR(1)
Dinsn-def.h123 #define RV_OPCODE(v) __ASM_STR(v)
124 #define RV_FUNC3(v) __ASM_STR(v)
125 #define RV_FUNC7(v) __ASM_STR(v)
126 #define RV_SIMM12(v) __ASM_STR(v)
127 #define RV_RD(v) __ASM_STR(v)
128 #define RV_RS1(v) __ASM_STR(v)
129 #define RV_RS2(v) __ASM_STR(v)
130 #define __RV_REG(v) __ASM_STR(x ## v)
160 __ASM_STR(.error "hlv.d requires 64-bit support")
Dcsr.h489 __asm__ __volatile__ ("csrrw %0, " __ASM_STR(csr) ", %1"\
498 __asm__ __volatile__ ("csrr %0, " __ASM_STR(csr) \
507 __asm__ __volatile__ ("csrw " __ASM_STR(csr) ", %0" \
515 __asm__ __volatile__ ("csrrs %0, " __ASM_STR(csr) ", %1"\
524 __asm__ __volatile__ ("csrs " __ASM_STR(csr) ", %0" \
532 __asm__ __volatile__ ("csrrc %0, " __ASM_STR(csr) ", %1"\
541 __asm__ __volatile__ ("csrc " __ASM_STR(csr) ", %0" \
/linux-6.12.1/tools/arch/riscv/include/asm/
Dcsr.h472 #define __ASM_STR(x) x
474 #define __ASM_STR(x) #x macro
482 __asm__ __volatile__ ("csrrw %0, " __ASM_STR(csr) ", %1"\
491 __asm__ __volatile__ ("csrr %0, " __ASM_STR(csr) \
500 __asm__ __volatile__ ("csrw " __ASM_STR(csr) ", %0" \
508 __asm__ __volatile__ ("csrrs %0, " __ASM_STR(csr) ", %1"\
517 __asm__ __volatile__ ("csrs " __ASM_STR(csr) ", %0" \
525 __asm__ __volatile__ ("csrrc %0, " __ASM_STR(csr) ", %1"\
534 __asm__ __volatile__ ("csrc " __ASM_STR(csr) ", %0" \