Searched refs:XUSB_PADCTL_UPHY_PLL_P0_CTL5 (Results 1 – 1 of 1) sorted by relevance
203 #define XUSB_PADCTL_UPHY_PLL_P0_CTL5 0x370 macro493 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL5); in tegra210_pex_uphy_enable()498 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL5); in tegra210_pex_uphy_enable()