Searched refs:XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_NDIV_USB_VAL (Results 1 – 1 of 1) sorted by relevance
173 #define XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_NDIV_USB_VAL 0x19 macro527 value |= XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_NDIV_USB_VAL << in tegra210_pex_uphy_enable()782 value |= XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_NDIV_USB_VAL << in tegra210_sata_uphy_enable()