Searched refs:XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_NDIV_SATA_VAL (Results 1 – 1 of 1) sorted by relevance
174 #define XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_NDIV_SATA_VAL 0x1e macro785 value |= XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_NDIV_SATA_VAL << in tegra210_sata_uphy_enable()