Searched refs:XGMAC_RX_CONFIG (Results 1 – 3 of 3) sorted by relevance
22 rx = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_core_init()46 writel(rx, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_core_init()53 u32 rx = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_set_mac()64 writel(rx, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_set_mac()72 value = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_rx_ipc()77 writel(value, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_rx_ipc()79 return !!(readl(ioaddr + XGMAC_RX_CONFIG) & XGMAC_CONFIG_IPC); in dwxgmac2_rx_ipc()386 u32 cfg = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_pmt()388 writel(cfg, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_pmt()557 u32 value = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_set_mac_loopback()[all …]
320 value = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_dma_start_rx()322 writel(value, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_dma_start_rx()578 u32 value = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_enable_sph()582 writel(value, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_enable_sph()
31 #define XGMAC_RX_CONFIG 0x00000004 macro