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Searched refs:XE_HW_ENGINE_CCS0 (Results 1 – 5 of 5) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/xe/
Dxe_hw_engine_types.h51 XE_HW_ENGINE_CCS0, enumerator
55 #define XE_HW_ENGINE_CCS_MASK GENMASK_ULL(XE_HW_ENGINE_CCS3, XE_HW_ENGINE_CCS0)
Dxe_gt.h22 #define CCS_MASK(gt) (((gt)->info.engine_mask & XE_HW_ENGINE_CCS_MASK) >> XE_HW_ENGINE_CCS0)
Dxe_pci.c118 BIT(XE_HW_ENGINE_CCS0) | BIT(XE_HW_ENGINE_CCS1) |
136 BIT(XE_HW_ENGINE_CCS0) | BIT(XE_HW_ENGINE_CCS1) |
156 BIT(XE_HW_ENGINE_CCS0),
175 GENMASK(XE_HW_ENGINE_CCS3, XE_HW_ENGINE_CCS0)
Dxe_gt_ccs_mode.c59 config |= BIT(hwe->instance) << XE_HW_ENGINE_CCS0; in __xe_gt_apply_ccs_mode()
Dxe_hw_engine.c229 [XE_HW_ENGINE_CCS0] = {
684 GENMASK_ULL(XE_HW_ENGINE_CCS3, XE_HW_ENGINE_CCS0)) <= 1) in read_compute_fuses_from_dss()
691 for (int i = XE_HW_ENGINE_CCS0, j = 0; i <= XE_HW_ENGINE_CCS3; ++i, ++j) { in read_compute_fuses_from_dss()
710 for (int i = XE_HW_ENGINE_CCS0, j = 0; i <= XE_HW_ENGINE_CCS3; ++i, ++j) { in read_compute_fuses_from_reg()