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Searched refs:WRITE_REG_CMD (Results 1 – 23 of 23) sorted by relevance

/linux-6.12.1/drivers/staging/rts5208/
Dspi.c89 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, SPI_RDSR); in sf_polling_status()
90 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, in sf_polling_status()
115 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, ins); in sf_enable_write()
116 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, in sf_enable_write()
118 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, in sf_enable_write()
143 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, ins); in sf_disable_write()
144 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, in sf_disable_write()
146 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, in sf_disable_write()
164 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, ins); in sf_program()
165 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, in sf_program()
[all …]
Dxd.c74 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_DAT, 0xFF, id_cmd); in xd_read_id()
75 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF, in xd_read_id()
103 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_ADDRESS0, 0xFF, 0); in xd_assign_phy_addr()
104 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_ADDRESS1, 0xFF, (u8)addr); in xd_assign_phy_addr()
105 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_ADDRESS2, in xd_assign_phy_addr()
107 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_ADDRESS3, in xd_assign_phy_addr()
109 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_CFG, 0xFF, in xd_assign_phy_addr()
116 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_ADDRESS0, 0xFF, (u8)addr); in xd_assign_phy_addr()
117 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_ADDRESS1, in xd_assign_phy_addr()
119 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_ADDRESS2, in xd_assign_phy_addr()
[all …]
Dsd.c134 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF, 0x40 | cmd_idx);
135 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD1, 0xFF, (u8)(arg >> 24));
136 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD2, 0xFF, (u8)(arg >> 16));
137 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD3, 0xFF, (u8)(arg >> 8));
138 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD4, 0xFF, (u8)arg);
140 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, rsp_type);
141 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
143 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER,
282 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0 + i,
285 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF,
[all …]
Drtsx_card.c665 rtsx_add_cmd(chip, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, CLK_LOW_FREQ); in switch_ssc_clock()
666 rtsx_add_cmd(chip, WRITE_REG_CMD, CLK_DIV, 0xFF, (div << 4) | mcu_cnt); in switch_ssc_clock()
667 rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, 0); in switch_ssc_clock()
668 rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_CTL2, ssc_depth_mask, ssc_depth); in switch_ssc_clock()
669 rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_DIV_N_0, 0xFF, n); in switch_ssc_clock()
670 rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, SSC_RSTB); in switch_ssc_clock()
672 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_VPCLK0_CTL, in switch_ssc_clock()
674 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_VPCLK0_CTL, in switch_ssc_clock()
826 rtsx_add_cmd(chip, WRITE_REG_CMD, IRQSTAT0, DMA_DONE_INT, DMA_DONE_INT); in trans_dma_enable()
828 rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC3, 0xFF, (u8)(byte_cnt >> 24)); in trans_dma_enable()
[all …]
Dms.c50 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc); in ms_transfer_tpc()
51 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt); in ms_transfer_tpc()
52 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg); in ms_transfer_tpc()
53 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, in ms_transfer_tpc()
56 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, in ms_transfer_tpc()
118 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc); in ms_transfer_data()
119 rtsx_add_cmd(chip, WRITE_REG_CMD, in ms_transfer_data()
121 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_SECTOR_CNT_L, 0xFF, (u8)sec_cnt); in ms_transfer_data()
122 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg); in ms_transfer_data()
125 rtsx_add_cmd(chip, WRITE_REG_CMD, in ms_transfer_data()
[all …]
Drtsx_chip.h300 #define WRITE_REG_CMD 1 macro
Drtsx_chip.c2074 rtsx_add_cmd(chip, WRITE_REG_CMD, reg_addr++, 0xFF, in rtsx_write_ppbuf()
2088 rtsx_add_cmd(chip, WRITE_REG_CMD, reg_addr++, 0xFF, in rtsx_write_ppbuf()
/linux-6.12.1/drivers/mmc/host/
Drtsx_usb_sdmmc.c111 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, in sd_read_data()
113 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, in sd_read_data()
115 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, in sd_read_data()
117 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, in sd_read_data()
119 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, in sd_read_data()
125 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt); in sd_read_data()
126 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H, in sd_read_data()
128 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1); in sd_read_data()
129 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0); in sd_read_data()
131 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, in sd_read_data()
[all …]
Drtsx_pci_sdmmc.c98 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CMD0, 0xFF, in sd_cmd_set_sd_cmd()
105 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, blocks); in sd_cmd_set_data_len()
106 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, blocks >> 8); in sd_cmd_set_data_len()
107 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, blksz); in sd_cmd_set_data_len()
108 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BYTE_CNT_H, 0xFF, blksz >> 8); in sd_cmd_set_data_len()
247 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF, rsp_type); in sd_send_cmd_get_rsp()
248 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DATA_SOURCE, in sd_send_cmd_get_rsp()
250 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_TRANSFER, in sd_send_cmd_get_rsp()
349 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF, in sd_read_data()
353 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in sd_read_data()
[all …]
/linux-6.12.1/drivers/memstick/host/
Drtsx_usb_ms.c116 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x55); in ms_pull_ctl_disable_lqfp48()
117 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55); in ms_pull_ctl_disable_lqfp48()
118 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95); in ms_pull_ctl_disable_lqfp48()
119 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55); in ms_pull_ctl_disable_lqfp48()
120 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55); in ms_pull_ctl_disable_lqfp48()
121 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5); in ms_pull_ctl_disable_lqfp48()
130 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x65); in ms_pull_ctl_disable_qfn24()
131 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55); in ms_pull_ctl_disable_qfn24()
132 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95); in ms_pull_ctl_disable_qfn24()
133 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55); in ms_pull_ctl_disable_qfn24()
[all …]
/linux-6.12.1/drivers/misc/cardreader/
Drts5227.c49 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_CLK_DRIVE_SEL, in rts5227_fill_driving()
51 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_CMD_DRIVE_SEL, in rts5227_fill_driving()
53 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_DAT_DRIVE_SEL, in rts5227_fill_driving()
111 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, GPIO_CTL, 0x02, 0x02); in rts5227_extra_init_hw()
113 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, ASPM_FORCE_CTL, 0x3F, 0); in rts5227_extra_init_hw()
115 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x00); in rts5227_extra_init_hw()
116 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x01); in rts5227_extra_init_hw()
118 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OLT_LED_CTL, 0x0F, 0x02); in rts5227_extra_init_hw()
122 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LTR_CTL, 0xFF, 0xA3); in rts5227_extra_init_hw()
124 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OBFF_CFG, 0x03, 0x03); in rts5227_extra_init_hw()
[all …]
Drts5229.c57 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, GPIO_CTL, 0x02, 0x02); in rts5229_extra_init_hw()
59 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, ASPM_FORCE_CTL, 0x3F, 0); in rts5229_extra_init_hw()
61 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0x08, 0x08); in rts5229_extra_init_hw()
63 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x00); in rts5229_extra_init_hw()
64 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x01); in rts5229_extra_init_hw()
66 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OLT_LED_CTL, 0x0F, 0x02); in rts5229_extra_init_hw()
68 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_DRIVE_SEL, in rts5229_extra_init_hw()
105 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL, in rts5229_card_power_on()
107 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL, in rts5229_card_power_on()
117 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL, in rts5229_card_power_on()
[all …]
Drtsx_usb.c326 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, HS_VSTAIN, 0xFF, val); in rtsx_usb_write_phy_register()
327 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, HS_VCONTROL, 0xFF, addr & 0x0F); in rtsx_usb_write_phy_register()
328 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x00); in rtsx_usb_write_phy_register()
329 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x00); in rtsx_usb_write_phy_register()
330 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x01); in rtsx_usb_write_phy_register()
331 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, HS_VCONTROL, in rtsx_usb_write_phy_register()
333 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x00); in rtsx_usb_write_phy_register()
334 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x00); in rtsx_usb_write_phy_register()
335 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x01); in rtsx_usb_write_phy_register()
343 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, addr, mask, data); in rtsx_usb_write_register()
[all …]
Drts5209.c60 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_GPIO, 0xFF, 0x03); in rts5209_extra_init_hw()
62 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, ASPM_FORCE_CTL, 0x3F, 0); in rts5209_extra_init_hw()
64 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0x08, 0x08); in rts5209_extra_init_hw()
66 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_GPIO_DIR, 0xFF, 0x03); in rts5209_extra_init_hw()
68 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_DRIVE_SEL, in rts5209_extra_init_hw()
115 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL, in rts5209_card_power_on()
117 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL, in rts5209_card_power_on()
127 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL, pwr_mask, pwr_on); in rts5209_card_power_on()
128 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL, in rts5209_card_power_on()
146 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL, in rts5209_card_power_off()
[all …]
Drts5249.c48 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_CLK_DRIVE_SEL, in rts5249_fill_driving()
50 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_CMD_DRIVE_SEL, in rts5249_fill_driving()
52 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_DAT_DRIVE_SEL, in rts5249_fill_driving()
244 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, L1SUB_CONFIG3, 0xFF, 0x00); in rts5249_extra_init_hw()
246 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, GPIO_CTL, 0x02, 0x02); in rts5249_extra_init_hw()
248 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, ASPM_FORCE_CTL, 0x3F, 0); in rts5249_extra_init_hw()
250 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x00); in rts5249_extra_init_hw()
251 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x01); in rts5249_extra_init_hw()
253 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OLT_LED_CTL, 0x0F, 0x02); in rts5249_extra_init_hw()
257 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB0, 0xB0); in rts5249_extra_init_hw()
[all …]
Drtl8411.c88 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_DRIVE_SEL, in rtl8411_extra_init_hw()
90 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CD_PAD_CTL, in rtl8411_extra_init_hw()
101 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in rtl8411b_extra_init_hw()
103 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_DRIVE_SEL, in rtl8411b_extra_init_hw()
105 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CD_PAD_CTL, in rtl8411b_extra_init_hw()
107 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, FUNC_FORCE_CTL, in rtl8411b_extra_init_hw()
138 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL, in rtl8411_card_power_on()
140 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_CTL, in rtl8411_card_power_on()
Drts5260.c385 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, L1SUB_CONFIG1, in rts5260_init_hw()
388 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, L1SUB_CONFIG3, 0xFF, 0x00); in rts5260_init_hw()
389 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PM_CLK_FORCE_CTL, in rts5260_init_hw()
391 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWD_SUSPEND_EN, 0xFF, 0xFF); in rts5260_init_hw()
392 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL, in rts5260_init_hw()
394 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, REG_VREF, in rts5260_init_hw()
396 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RBCTL, in rts5260_init_hw()
400 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB0, 0xB0); in rts5260_init_hw()
402 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB0, 0x80); in rts5260_init_hw()
404 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OBFF_CFG, in rts5260_init_hw()
Drtsx_pcr.c596 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in rtsx_pci_write_ppbuf()
610 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in rtsx_pci_write_ppbuf()
629 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in rtsx_pci_set_pull_ctl()
788 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in rtsx_pci_switch_clock()
790 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_DIV, in rtsx_pci_switch_clock()
792 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, 0); in rtsx_pci_switch_clock()
793 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, in rtsx_pci_switch_clock()
795 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_DIV_N_0, 0xFF, n); in rtsx_pci_switch_clock()
796 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, SSC_RSTB); in rtsx_pci_switch_clock()
798 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rtsx_pci_switch_clock()
[all …]
Drts5264.c797 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in rts5264_pci_switch_clock()
799 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_DIV, in rts5264_pci_switch_clock()
801 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, 0); in rts5264_pci_switch_clock()
802 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, in rts5264_pci_switch_clock()
804 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_DIV_N_0, 0xFF, n); in rts5264_pci_switch_clock()
807 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, 0); in rts5264_pci_switch_clock()
808 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RTS5264_CARD_CLK_SRC2, in rts5264_pci_switch_clock()
811 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, SSC_RSTB); in rts5264_pci_switch_clock()
812 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RTS5264_SYS_DUMMY_1, in rts5264_pci_switch_clock()
817 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rts5264_pci_switch_clock()
[all …]
Drts5228.c648 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in rts5228_pci_switch_clock()
650 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_DIV, in rts5228_pci_switch_clock()
652 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, 0); in rts5228_pci_switch_clock()
653 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, in rts5228_pci_switch_clock()
655 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_DIV_N_0, 0xFF, n); in rts5228_pci_switch_clock()
656 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, SSC_RSTB); in rts5228_pci_switch_clock()
658 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rts5228_pci_switch_clock()
660 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK1_CTL, in rts5228_pci_switch_clock()
662 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rts5228_pci_switch_clock()
664 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK1_CTL, in rts5228_pci_switch_clock()
Drts5261.c727 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in rts5261_pci_switch_clock()
729 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_DIV, in rts5261_pci_switch_clock()
731 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, 0); in rts5261_pci_switch_clock()
732 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, in rts5261_pci_switch_clock()
734 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_DIV_N_0, 0xFF, n); in rts5261_pci_switch_clock()
735 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, SSC_RSTB); in rts5261_pci_switch_clock()
737 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rts5261_pci_switch_clock()
739 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK1_CTL, in rts5261_pci_switch_clock()
741 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rts5261_pci_switch_clock()
743 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK1_CTL, in rts5261_pci_switch_clock()
/linux-6.12.1/include/linux/
Drtsx_pci.h23 #define WRITE_REG_CMD 1 macro
1343 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg, 0xFF, val >> 24); in rtsx_pci_write_be32()
1344 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 1, 0xFF, val >> 16); in rtsx_pci_write_be32()
1345 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 2, 0xFF, val >> 8); in rtsx_pci_write_be32()
1346 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 3, 0xFF, val); in rtsx_pci_write_be32()
Drtsx_usb.h100 #define WRITE_REG_CMD 1 macro