/linux-6.12.1/crypto/ |
D | sm3.c | 64 #define W1(i) (W[i & 0x0f]) macro 89 R1(a, b, c, d, e, f, g, h, K[4], W1(4), I(8)); in sm3_transform() 90 R1(d, a, b, c, h, e, f, g, K[5], W1(5), I(9)); in sm3_transform() 91 R1(c, d, a, b, g, h, e, f, K[6], W1(6), I(10)); in sm3_transform() 92 R1(b, c, d, a, f, g, h, e, K[7], W1(7), I(11)); in sm3_transform() 93 R1(a, b, c, d, e, f, g, h, K[8], W1(8), I(12)); in sm3_transform() 94 R1(d, a, b, c, h, e, f, g, K[9], W1(9), I(13)); in sm3_transform() 95 R1(c, d, a, b, g, h, e, f, K[10], W1(10), I(14)); in sm3_transform() 96 R1(b, c, d, a, f, g, h, e, K[11], W1(11), I(15)); in sm3_transform() 97 R1(a, b, c, d, e, f, g, h, K[12], W1(12), W2(16)); in sm3_transform() [all …]
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/linux-6.12.1/arch/x86/crypto/ |
D | sm3-avx-asm_64.S | 118 #define W1 %xmm1 macro 264 vpshufd $0b11111001, XTMP0, W1; /* W1: xx, w3, w2, w1 */ \ 381 R1(c, d, a, b, g, h, e, f, 6, 2, IW); SCHED_W_0(12, W0, W1, W2, W3, W4, W5); 382 R1(b, c, d, a, f, g, h, e, 7, 3, IW); SCHED_W_1(12, W0, W1, W2, W3, W4, W5); 385 R1(a, b, c, d, e, f, g, h, 8, 0, IW); SCHED_W_2(12, W0, W1, W2, W3, W4, W5); 386 R1(d, a, b, c, h, e, f, g, 9, 1, IW); SCHED_W_0(15, W1, W2, W3, W4, W5, W0); 387 R1(c, d, a, b, g, h, e, f, 10, 2, IW); SCHED_W_1(15, W1, W2, W3, W4, W5, W0); 388 R1(b, c, d, a, f, g, h, e, 11, 3, IW); SCHED_W_2(15, W1, W2, W3, W4, W5, W0); 391 R1(a, b, c, d, e, f, g, h, 12, 0, XW); SCHED_W_0(18, W2, W3, W4, W5, W0, W1); 392 R1(d, a, b, c, h, e, f, g, 13, 1, XW); SCHED_W_1(18, W2, W3, W4, W5, W0, W1); [all …]
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/linux-6.12.1/arch/riscv/crypto/ |
D | sm3-riscv64-zvksh-zvkb.S | 58 #define W1 v6 // LMUL=2 macro 100 vle32.v W1, (DATA) 104 sm3_8rounds 0, W0, W1 105 sm3_8rounds 4, W1, W0 106 sm3_8rounds 8, W0, W1 107 sm3_8rounds 12, W1, W0 108 sm3_8rounds 16, W0, W1 109 sm3_8rounds 20, W1, W0 110 sm3_8rounds 24, W0, W1 111 sm3_8rounds 28, W1, W0
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D | sha512-riscv64-zvknhb-zvkb.S | 61 #define W1 v12 // LMUL=2 macro 90 sha512_4rounds \last, W0, W1, W2, W3 91 sha512_4rounds \last, W1, W2, W3, W0 92 sha512_4rounds \last, W2, W3, W0, W1 93 sha512_4rounds \last, W3, W0, W1, W2 129 vle64.v W1, (DATA) 130 vrev8.v W1, W1
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D | sha256-riscv64-zvknha_or_zvknhb-zvkb.S | 60 #define W1 v3 macro 103 sha256_4rounds \last, \k0, W0, W1, W2, W3 104 sha256_4rounds \last, \k1, W1, W2, W3, W0 105 sha256_4rounds \last, \k2, W2, W3, W0, W1 106 sha256_4rounds \last, \k3, W3, W0, W1, W2 176 vle32.v W1, (DATA) 177 vrev8.v W1, W1
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/linux-6.12.1/Documentation/driver-api/ |
D | w1.rst | 2 W1: Dallas' 1-wire bus 7 W1 API internal to the kernel 13 W1 kernel API functions. 21 W1 core functions. 37 W1 internal initialization for master devices. 45 W1 internal initialization for master devices. 53 W1 external netlink API structures and commands. 61 W1 input/output.
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/linux-6.12.1/arch/arm/crypto/ |
D | sha1-armv7-neon.S | 59 #define W1 q7 macro 371 W1, W2, W3, W4, W5, _, _, _ ); 374 W1, W2, W3, W4, W5, _, _, _ ); 377 W1, W2, W3, W4, W5, _, _, _ ); 380 W1, W2, W3, W4, W5, _, _, _ ); 385 W0, W1, W2, W3, W4, W5, W6, W7); 388 W0, W1, W2, W3, W4, W5, W6, W7); 391 W0, W1, W2, W3, W4, W5, W6, W7); 394 W0, W1, W2, W3, W4, W5, W6, W7); 398 W7, W0, W1, W2, W3, W4, W5, W6); [all …]
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D | sha256-armv4.pl | 588 my ($W0,$W1,$ABCD_SAVE,$EFGH_SAVE)=map("q$_",(12..15)); 627 vld1.32 {$W1},[$Ktbl]! 635 ($W0,$W1)=($W1,$W0); push(@MSG,shift(@MSG)); 638 vld1.32 {$W1},[$Ktbl]! 645 vadd.i32 $W1,$W1,@MSG[1] 647 sha256h $ABCD,$EFGH,$W1 648 sha256h2 $EFGH,$abcd,$W1 650 vld1.32 {$W1},[$Ktbl] 657 vadd.i32 $W1,$W1,@MSG[3] 659 sha256h $ABCD,$EFGH,$W1 [all …]
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/linux-6.12.1/drivers/w1/ |
D | Kconfig | 2 menuconfig W1 config 9 If you want W1 support, you should say Y here. 11 This W1 support can also be built as a module. If so, the module 14 if W1 32 endif # W1
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/linux-6.12.1/arch/arm64/crypto/ |
D | sha512-armv8.pl | 375 my ($W0,$W1)=("v16.4s","v17.4s"); 403 ld1.32 {$W1},[$Ktbl],#16 411 ($W0,$W1)=($W1,$W0); push(@MSG,shift(@MSG)); 414 ld1.32 {$W1},[$Ktbl],#16 421 add.i32 $W1,$W1,@MSG[1] 423 sha256h $ABCD,$EFGH,$W1 424 sha256h2 $EFGH,$abcd,$W1 426 ld1.32 {$W1},[$Ktbl] 433 add.i32 $W1,$W1,@MSG[3] 435 sha256h $ABCD,$EFGH,$W1 [all …]
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D | sm3-neon-core.S | 70 #define W1 v1 macro 191 ld1 {W1.16b}, [RDATA], #16; 199 rev32 XTMP1.16b, W1.16b; 223 ext W1.16b, XTMP0.16b, XTMP0.16b, #4; /* W1: xx, w3, w2, w1 */ 305 SCHED_W_1_##iop_num(round, W0, W1, W2, W3, W4, W5) 307 SCHED_W_2_##iop_num(round, W0, W1, W2, W3, W4, W5) 309 SCHED_W_3_##iop_num(round, W0, W1, W2, W3, W4, W5) 312 SCHED_W_1_##iop_num(round, W1, W2, W3, W4, W5, W0) 314 SCHED_W_2_##iop_num(round, W1, W2, W3, W4, W5, W0) 316 SCHED_W_3_##iop_num(round, W1, W2, W3, W4, W5, W0) [all …]
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/linux-6.12.1/Documentation/w1/masters/ |
D | omap-hdq.rst | 34 controller. In this mode, as we can not read the ID which obeys the W1 36 be used to calculate the CRC and pass back an appropriate slave ID to the W1
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D | ds2490.rst | 16 which allows to build USB <-> W1 bridges. 18 DS9490(R) is a USB <-> W1 bus master device
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/linux-6.12.1/drivers/w1/masters/ |
D | Kconfig | 30 tristate "DS2490 USB <-> W1 transport layer for 1-wire" 33 Say Y here if you want to have a driver for DS2490 based USB <-> W1 bridges,
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/linux-6.12.1/drivers/base/regmap/ |
D | Kconfig | 57 depends on W1
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/linux-6.12.1/Documentation/w1/ |
D | w1-generic.rst | 19 - W1-over-GPIO 49 W1 device families
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D | w1-netlink.rst | 100 W1 search and alarm search commands. 129 W1 reset command::
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/linux-6.12.1/Documentation/admin-guide/device-mapper/ |
D | log-writes.rst | 29 W1,W2,W3,C3,C2,Wflush,C1,Cflush 33 W3,W2,flush,W1....
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/linux-6.12.1/Documentation/driver-api/gpio/ |
D | drivers-on-gpio.rst | 66 a GPIO line, integrating with the W1 subsystem and handling devices on 67 the bus like any other W1 device.
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/linux-6.12.1/drivers/power/supply/ |
D | Kconfig | 131 depends on W1 138 select W1 146 select W1 283 depends on W1 428 depends on W1 434 OneWire (W1) host interface.
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/linux-6.12.1/tools/testing/selftests/net/netfilter/ |
D | nft_concat_range.sh | 515 B ping -c1 -W1 "${dst_addr4}" >/dev/null 2>&1 525 B ping6 -q -c1 -W1 "${dst_addr6}" 531 B ping -q -6 -c1 -W1 "${dst_addr6}"
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/linux-6.12.1/arch/arm/boot/dts/intel/pxa/ |
D | pxa300-raumfeld-controller.dts | 33 &gpio 126 GPIO_OPEN_DRAIN /* W1 I/O */
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/linux-6.12.1/drivers/pinctrl/aspeed/ |
D | pinctrl-aspeed-g5.c | 742 #define W1 95 macro 744 SIG_EXPR_LIST_DECL_SINGLE(W1, DASHW1, DASHW1, VPIRSVD_DESC, W1_DESC); 745 SIG_EXPR_LIST_DECL_SINGLE(W1, RXD1, RXD1, W1_DESC, COND2); 746 PIN_DECL_2(W1, GPIOL7, DASHW1, RXD1); 747 FUNC_GROUP_DECL(RXD1, W1); 2115 ASPEED_PINCTRL_PIN(W1), 2533 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, T2, W1, SCU8C, 27), 2534 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, T2, W1, SCU8C, 27),
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D | pinctrl-aspeed-g4.c | 764 #define W1 94 macro 766 SIG_EXPR_LIST_DECL_SINGLE(W1, VPIB0, VPI30, VPI30_DESC, W1_DESC); 767 SIG_EXPR_LIST_DECL_SINGLE(W1, TXD1, TXD1, W1_DESC); 768 PIN_DECL_2(W1, GPIOL6, VPIB0, TXD1); 769 FUNC_GROUP_DECL(TXD1, W1); 1037 FUNC_GROUP_DECL(VPI30, T5, U3, V1, U4, V2, W1, U5, V3, W2, Y1, V4, W3, Y2, AA1, 2110 ASPEED_PINCTRL_PIN(W1),
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/linux-6.12.1/Documentation/gpu/amdgpu/display/ |
D | display-contributing.rst | 49 Enable the W1 or W2 warning level in the kernel compilation and try to fix the
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