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Searched refs:VTD_PAGE_SIZE (Results 1 – 6 of 6) sorted by relevance

/linux-6.12.1/drivers/iommu/intel/
Diommu.h34 #define VTD_PAGE_SIZE (1UL << VTD_PAGE_SHIFT) macro
36 #define VTD_PAGE_ALIGN(addr) (((addr) + VTD_PAGE_SIZE - 1) & VTD_PAGE_MASK)
873 return IS_ALIGNED((unsigned long)pte, VTD_PAGE_SIZE); in first_pte_in_page()
879 (struct dma_pte *)ALIGN((unsigned long)pte, VTD_PAGE_SIZE) - pte; in nr_pte_to_next_page()
1168 if (!IS_ALIGNED(addr, VTD_PAGE_SIZE << size_order)) in qi_desc_dev_iotlb_pasid()
Dnested.c116 if (!IS_ALIGNED(inv_entry.addr, VTD_PAGE_SIZE) || in intel_nested_cache_invalidate_user()
Diommu.c35 #define ROOT_SIZE VTD_PAGE_SIZE
36 #define CONTEXT_SIZE VTD_PAGE_SIZE
69 #define ROOT_ENTRY_NR (VTD_PAGE_SIZE/sizeof(struct root_entry))
839 domain_flush_cache(domain, tmp_page, VTD_PAGE_SIZE); in pfn_to_dma_pte()
1862 pteval += lvl_pages * VTD_PAGE_SIZE; in __domain_mapping()
2100 VTD_PAGE_SIZE); in copy_context_table()
2152 __iommu_flush_cache(iommu, new_ce, VTD_PAGE_SIZE); in copy_context_table()
3716 if (size < VTD_PAGE_SIZE << level_to_offset_bits(level)) in intel_iommu_unmap()
3717 size = VTD_PAGE_SIZE << level_to_offset_bits(level); in intel_iommu_unmap()
Ddmar.c894 addr = ioremap(drhd->address, VTD_PAGE_SIZE); in dmar_validate_one_drhd()
896 addr = early_ioremap(drhd->address, VTD_PAGE_SIZE); in dmar_validate_one_drhd()
908 early_iounmap(addr, VTD_PAGE_SIZE); in dmar_validate_one_drhd()
Dcache.c262 return ALIGN_DOWN(start, VTD_PAGE_SIZE << mask); in calculate_psi_aligned_address()
Dpasid.c168 clflush_cache_range(entries, VTD_PAGE_SIZE); in intel_pasid_get_entry()