Searched refs:VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0 (Results 1 – 2 of 2) sorted by relevance
98 #define VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0 0x00030024u macro
336 u32 val = REGV_RD32(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0); in pwr_island_drive_40xx()339 val = REG_SET_FLD(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0, MSS_CPU, val); in pwr_island_drive_40xx()341 val = REG_CLR_FLD(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0, MSS_CPU, val); in pwr_island_drive_40xx()343 REGV_WR32(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0, val); in pwr_island_drive_40xx()