Searched refs:VPU_37XX_HOST_IF_TBU_MMUSSIDV (Results 1 – 2 of 2) sorted by relevance
768 u32 val = REGV_RD32(VPU_37XX_HOST_IF_TBU_MMUSSIDV); in ivpu_hw_ip_tbu_mmu_enable_37xx()770 val = REG_SET_FLD(VPU_37XX_HOST_IF_TBU_MMUSSIDV, TBU0_AWMMUSSIDV, val); in ivpu_hw_ip_tbu_mmu_enable_37xx()771 val = REG_SET_FLD(VPU_37XX_HOST_IF_TBU_MMUSSIDV, TBU0_ARMMUSSIDV, val); in ivpu_hw_ip_tbu_mmu_enable_37xx()772 val = REG_SET_FLD(VPU_37XX_HOST_IF_TBU_MMUSSIDV, TBU2_AWMMUSSIDV, val); in ivpu_hw_ip_tbu_mmu_enable_37xx()773 val = REG_SET_FLD(VPU_37XX_HOST_IF_TBU_MMUSSIDV, TBU2_ARMMUSSIDV, val); in ivpu_hw_ip_tbu_mmu_enable_37xx()775 REGV_WR32(VPU_37XX_HOST_IF_TBU_MMUSSIDV, val); in ivpu_hw_ip_tbu_mmu_enable_37xx()
132 #define VPU_37XX_HOST_IF_TBU_MMUSSIDV 0x00360004u macro