/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
D | gfxhub_v1_0.c | 197 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 12); in gfxhub_v1_0_init_cache_regs() 198 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in gfxhub_v1_0_init_cache_regs() 201 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 9); in gfxhub_v1_0_init_cache_regs() 202 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in gfxhub_v1_0_init_cache_regs()
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D | mmhub_v1_8.c | 251 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 12); in mmhub_v1_8_init_cache_regs() 252 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in mmhub_v1_8_init_cache_regs() 255 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 9); in mmhub_v1_8_init_cache_regs() 256 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in mmhub_v1_8_init_cache_regs()
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D | gfxhub_v1_2.c | 246 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 12); in gfxhub_v1_2_xcc_init_cache_regs() 247 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in gfxhub_v1_2_xcc_init_cache_regs() 250 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 9); in gfxhub_v1_2_xcc_init_cache_regs() 251 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in gfxhub_v1_2_xcc_init_cache_regs()
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D | mmhub_v1_0.c | 183 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 12); in mmhub_v1_0_init_cache_regs() 184 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in mmhub_v1_0_init_cache_regs() 187 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 9); in mmhub_v1_0_init_cache_regs() 188 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in mmhub_v1_0_init_cache_regs()
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D | mmhub_v1_7.c | 201 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 12); in mmhub_v1_7_init_cache_regs() 202 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in mmhub_v1_7_init_cache_regs() 205 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 9); in mmhub_v1_7_init_cache_regs() 206 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in mmhub_v1_7_init_cache_regs()
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D | gmc_v7_0.c | 636 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY, 1); in gmc_v7_0_gart_enable() 637 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, field); in gmc_v7_0_gart_enable() 638 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, L2_CACHE_BIGK_FRAGMENT_SIZE, field); in gmc_v7_0_gart_enable()
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D | gmc_v8_0.c | 852 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY, 1); in gmc_v8_0_gart_enable() 853 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, field); in gmc_v8_0_gart_enable() 854 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, L2_CACHE_BIGK_FRAGMENT_SIZE, field); in gmc_v8_0_gart_enable()
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D | sid.h | 386 #define VM_L2_CNTL3 0x502 macro
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/linux-6.12.1/drivers/gpu/drm/radeon/ |
D | rv770.c | 911 WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2)); in rv770_pcie_gart_enable() 957 WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2)); in rv770_pcie_gart_disable() 988 WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2)); in rv770_agp_enable()
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D | rv770d.h | 650 #define VM_L2_CNTL3 0x1408 macro
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D | ni.c | 1275 WREG32(VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY | in cayman_pcie_gart_enable() 1354 WREG32(VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY | in cayman_pcie_gart_disable()
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D | nid.h | 120 #define VM_L2_CNTL3 0x1408 macro
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D | sid.h | 385 #define VM_L2_CNTL3 0x1408 macro
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D | cikd.h | 503 #define VM_L2_CNTL3 0x1408 macro
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D | r600.c | 1146 WREG32(VM_L2_CNTL3, BANK_SELECT_0(0) | BANK_SELECT_1(1)); in r600_pcie_gart_enable() 1198 WREG32(VM_L2_CNTL3, BANK_SELECT_0(0) | BANK_SELECT_1(1)); in r600_pcie_gart_disable() 1238 WREG32(VM_L2_CNTL3, BANK_SELECT_0(0) | BANK_SELECT_1(1)); in r600_agp_enable()
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D | evergreen.c | 2417 WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2)); in evergreen_pcie_gart_enable() 2470 WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2)); in evergreen_pcie_gart_disable() 2500 WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2)); in evergreen_agp_enable()
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D | evergreend.h | 1158 #define VM_L2_CNTL3 0x1408 macro
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D | r600d.h | 595 #define VM_L2_CNTL3 0x1408 macro
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D | si.c | 4292 WREG32(VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY | in si_pcie_gart_enable() 4378 WREG32(VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY | in si_pcie_gart_disable()
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D | cik.c | 5446 WREG32(VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY | in cik_pcie_gart_enable() 5563 WREG32(VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY | in cik_pcie_gart_disable()
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