Searched refs:VECS0_VECS1_INTR_MASK (Results 1 – 2 of 2) sorted by relevance
186 xe_mmio_write32(gt, VECS0_VECS1_INTR_MASK, ~dmask); in xe_irq_enable_hwe()503 xe_mmio_write32(mmio, VECS0_VECS1_INTR_MASK, ~0); in gt_irq_reset()
599 #define VECS0_VECS1_INTR_MASK XE_REG(0x1900d0, XE_REG_OPTION_VF) macro