Searched refs:VC5_OUT_DIV_CONTROL (Results 1 – 1 of 1) sorted by relevance
77 #define VC5_OUT_DIV_CONTROL(idx) (0x21 + ((idx) * 0x10)) macro626 ret = regmap_read(vc5->regmap, VC5_OUT_DIV_CONTROL(hwdata->num), &src); in vc5_clk_out_prepare()633 VC5_OUT_DIV_CONTROL(hwdata->num), in vc5_clk_out_prepare()685 ret = regmap_read(vc5->regmap, VC5_OUT_DIV_CONTROL(hwdata->num), &src); in vc5_clk_out_get_parent()722 return regmap_update_bits(vc5->regmap, VC5_OUT_DIV_CONTROL(hwdata->num), in vc5_clk_out_set_parent()