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Searched refs:UVD_CGC_GATE__UDEC_MASK (Results 1 – 24 of 24) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Duvd_v6_0.c649 UVD_CGC_GATE__UDEC_MASK |
681 UVD_CGC_GATE__UDEC_MASK |
1305 UVD_CGC_GATE__UDEC_MASK | in uvd_v6_0_enable_clock_gating()
1394 UVD_CGC_GATE__UDEC_MASK |
Duvd_v5_0.c649 UVD_CGC_GATE__UDEC_MASK | in uvd_v5_0_enable_clock_gating()
736 UVD_CGC_GATE__UDEC_MASK |
Dvcn_v4_0_5.c661 | UVD_CGC_GATE__UDEC_MASK in vcn_v4_0_5_disable_clock_gating()
Duvd_v7_0.c1678 UVD_CGC_GATE__UDEC_MASK |
Dvcn_v1_0.c525 | UVD_CGC_GATE__UDEC_MASK in vcn_v1_0_disable_clock_gating()
Dvcn_v2_0.c553 | UVD_CGC_GATE__UDEC_MASK in vcn_v2_0_disable_clock_gating()
Dvcn_v4_0.c725 | UVD_CGC_GATE__UDEC_MASK in vcn_v4_0_disable_clock_gating()
Dvcn_v2_5.c640 | UVD_CGC_GATE__UDEC_MASK in vcn_v2_5_disable_clock_gating()
Dvcn_v3_0.c759 | UVD_CGC_GATE__UDEC_MASK in vcn_v3_0_disable_clock_gating()
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h398 #define UVD_CGC_GATE__UDEC_MASK … macro
Duvd_3_1_sh_mask.h125 #define UVD_CGC_GATE__UDEC_MASK 0x2 macro
Duvd_4_0_sh_mask.h108 #define UVD_CGC_GATE__UDEC_MASK 0x00000002L macro
Duvd_4_2_sh_mask.h125 #define UVD_CGC_GATE__UDEC_MASK 0x2 macro
Duvd_5_0_sh_mask.h137 #define UVD_CGC_GATE__UDEC_MASK 0x2 macro
Duvd_6_0_sh_mask.h139 #define UVD_CGC_GATE__UDEC_MASK 0x2 macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h826 #define UVD_CGC_GATE__UDEC_MASK … macro
Dvcn_2_5_sh_mask.h1896 #define UVD_CGC_GATE__UDEC_MASK … macro
Dvcn_2_0_0_sh_mask.h1845 #define UVD_CGC_GATE__UDEC_MASK … macro
Dvcn_2_6_0_sh_mask.h3567 #define UVD_CGC_GATE__UDEC_MASK … macro
Dvcn_3_0_0_sh_mask.h2626 #define UVD_CGC_GATE__UDEC_MASK … macro
Dvcn_5_0_0_sh_mask.h61 #define UVD_CGC_GATE__UDEC_MASK … macro
Dvcn_4_0_5_sh_mask.h57 #define UVD_CGC_GATE__UDEC_MASK … macro
Dvcn_4_0_0_sh_mask.h61 #define UVD_CGC_GATE__UDEC_MASK … macro
Dvcn_4_0_3_sh_mask.h61 #define UVD_CGC_GATE__UDEC_MASK … macro