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Searched refs:UVD_CGC_CTRL__UDEC_IT_MODE_MASK (Results 1 – 24 of 24) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h446 #define UVD_CGC_CTRL__UDEC_IT_MODE_MASK … macro
Duvd_3_1_sh_mask.h231 #define UVD_CGC_CTRL__UDEC_IT_MODE_MASK 0x2000 macro
Duvd_4_0_sh_mask.h66 #define UVD_CGC_CTRL__UDEC_IT_MODE_MASK 0x00002000L macro
Duvd_4_2_sh_mask.h231 #define UVD_CGC_CTRL__UDEC_IT_MODE_MASK 0x2000 macro
Duvd_5_0_sh_mask.h253 #define UVD_CGC_CTRL__UDEC_IT_MODE_MASK 0x2000 macro
Duvd_6_0_sh_mask.h255 #define UVD_CGC_CTRL__UDEC_IT_MODE_MASK 0x2000 macro
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dvcn_v4_0_5.c687 | UVD_CGC_CTRL__UDEC_IT_MODE_MASK in vcn_v4_0_5_disable_clock_gating()
772 UVD_CGC_CTRL__UDEC_IT_MODE_MASK | in vcn_v4_0_5_disable_clock_gating_dpg_mode()
830 | UVD_CGC_CTRL__UDEC_IT_MODE_MASK in vcn_v4_0_5_enable_clock_gating()
Dvcn_v1_0.c549 | UVD_CGC_CTRL__UDEC_IT_MODE_MASK in vcn_v1_0_disable_clock_gating()
649 | UVD_CGC_CTRL__UDEC_IT_MODE_MASK in vcn_v1_0_enable_clock_gating()
707 UVD_CGC_CTRL__UDEC_IT_MODE_MASK | in vcn_v1_0_clock_gating_dpg_mode()
Dvcn_v2_0.c577 | UVD_CGC_CTRL__UDEC_IT_MODE_MASK in vcn_v2_0_disable_clock_gating()
653 UVD_CGC_CTRL__UDEC_IT_MODE_MASK | in vcn_v2_0_clock_gating_dpg_mode()
714 | UVD_CGC_CTRL__UDEC_IT_MODE_MASK in vcn_v2_0_enable_clock_gating()
Dvcn_v4_0.c751 | UVD_CGC_CTRL__UDEC_IT_MODE_MASK in vcn_v4_0_disable_clock_gating()
836 UVD_CGC_CTRL__UDEC_IT_MODE_MASK | in vcn_v4_0_disable_clock_gating_dpg_mode()
894 | UVD_CGC_CTRL__UDEC_IT_MODE_MASK in vcn_v4_0_enable_clock_gating()
Duvd_v5_0.c698 UVD_CGC_CTRL__UDEC_IT_MODE_MASK | in uvd_v5_0_set_sw_clock_gating()
Dvcn_v2_5.c667 | UVD_CGC_CTRL__UDEC_IT_MODE_MASK in vcn_v2_5_disable_clock_gating()
744 UVD_CGC_CTRL__UDEC_IT_MODE_MASK | in vcn_v2_5_clock_gating_dpg_mode()
806 | UVD_CGC_CTRL__UDEC_IT_MODE_MASK in vcn_v2_5_enable_clock_gating()
Dvcn_v3_0.c786 | UVD_CGC_CTRL__UDEC_IT_MODE_MASK in vcn_v3_0_disable_clock_gating()
885 UVD_CGC_CTRL__UDEC_IT_MODE_MASK | in vcn_v3_0_clock_gating_dpg_mode()
944 | UVD_CGC_CTRL__UDEC_IT_MODE_MASK in vcn_v3_0_enable_clock_gating()
Duvd_v6_0.c1355 UVD_CGC_CTRL__UDEC_IT_MODE_MASK | in uvd_v6_0_set_sw_clock_gating()
Duvd_v7_0.c1637 UVD_CGC_CTRL__UDEC_IT_MODE_MASK |
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h939 #define UVD_CGC_CTRL__UDEC_IT_MODE_MASK … macro
Dvcn_2_5_sh_mask.h2007 #define UVD_CGC_CTRL__UDEC_IT_MODE_MASK … macro
Dvcn_2_0_0_sh_mask.h1958 #define UVD_CGC_CTRL__UDEC_IT_MODE_MASK … macro
Dvcn_2_6_0_sh_mask.h3678 #define UVD_CGC_CTRL__UDEC_IT_MODE_MASK … macro
Dvcn_3_0_0_sh_mask.h2737 #define UVD_CGC_CTRL__UDEC_IT_MODE_MASK … macro
Dvcn_5_0_0_sh_mask.h115 #define UVD_CGC_CTRL__UDEC_IT_MODE_MASK … macro
Dvcn_4_0_5_sh_mask.h111 #define UVD_CGC_CTRL__UDEC_IT_MODE_MASK … macro
Dvcn_4_0_0_sh_mask.h115 #define UVD_CGC_CTRL__UDEC_IT_MODE_MASK … macro
Dvcn_4_0_3_sh_mask.h115 #define UVD_CGC_CTRL__UDEC_IT_MODE_MASK … macro