Searched refs:UTMIPLL_HW_PWRDN_CFG0_SEQ_RESET_INPUT_VALUE (Results 1 – 2 of 2) sorted by relevance
| /linux-6.12.1/drivers/clk/tegra/ | ||
| D | clk-pll.c | 210 #define UTMIPLL_HW_PWRDN_CFG0_SEQ_RESET_INPUT_VALUE BIT(5) macro |
| D | clk-tegra210.c | 203 #define UTMIPLL_HW_PWRDN_CFG0_SEQ_RESET_INPUT_VALUE BIT(5) macro |