Home
last modified time | relevance | path

Searched refs:UPLL_CTLREQ_MASK (Results 1 – 9 of 9) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dsi.c1644 WREG32_P(cg_upll_func_cntl, 0, ~UPLL_CTLREQ_MASK); in si_uvd_send_upll_ctlreq()
1649 WREG32_P(cg_upll_func_cntl, UPLL_CTLREQ_MASK, ~UPLL_CTLREQ_MASK); in si_uvd_send_upll_ctlreq()
1661 WREG32_P(cg_upll_func_cntl, 0, ~UPLL_CTLREQ_MASK); in si_uvd_send_upll_ctlreq()
1871 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, 0, ~UPLL_CTLREQ_MASK); in si_vce_send_vcepll_ctlreq()
1876 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, UPLL_CTLREQ_MASK, ~UPLL_CTLREQ_MASK); in si_vce_send_vcepll_ctlreq()
1888 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, 0, ~UPLL_CTLREQ_MASK); in si_vce_send_vcepll_ctlreq()
Dsid.h132 # define UPLL_CTLREQ_MASK 0x00000008 macro
/linux-6.12.1/drivers/gpu/drm/radeon/
Dradeon_uvd.c1017 WREG32_P(cg_upll_func_cntl, 0, ~UPLL_CTLREQ_MASK); in radeon_uvd_send_upll_ctlreq()
1022 WREG32_P(cg_upll_func_cntl, UPLL_CTLREQ_MASK, ~UPLL_CTLREQ_MASK); in radeon_uvd_send_upll_ctlreq()
1033 WREG32_P(cg_upll_func_cntl, 0, ~UPLL_CTLREQ_MASK); in radeon_uvd_send_upll_ctlreq()
Drv770d.h46 # define UPLL_CTLREQ_MASK 0x00000008 macro
Dsid.h131 # define UPLL_CTLREQ_MASK 0x00000008 macro
Dsi.c7434 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, 0, ~UPLL_CTLREQ_MASK); in si_vce_send_vcepll_ctlreq()
7439 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, UPLL_CTLREQ_MASK, ~UPLL_CTLREQ_MASK); in si_vce_send_vcepll_ctlreq()
7450 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, 0, ~UPLL_CTLREQ_MASK); in si_vce_send_vcepll_ctlreq()
Devergreend.h352 # define UPLL_CTLREQ_MASK 0x00000008 macro
Dr600d.h1560 # define UPLL_CTLREQ_MASK 0x00000008 macro
Dr600.c215 UPLL_RESET_MASK | UPLL_SLEEP_MASK | UPLL_CTLREQ_MASK)); in r600_set_uvd_clocks()