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Searched refs:UMC_BASE__INST5_SEG2 (Results 1 – 12 of 12) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/
Dnavi10_ip_offset.h808 #define UMC_BASE__INST5_SEG2 0 macro
Dvega20_ip_offset.h875 #define UMC_BASE__INST5_SEG2 0 macro
Dnavi14_ip_offset.h1023 #define UMC_BASE__INST5_SEG2 0 macro
Dnavi12_ip_offset.h1023 #define UMC_BASE__INST5_SEG2 0 macro
Ddimgrey_cavefish_ip_offset.h986 #define UMC_BASE__INST5_SEG2 0 macro
Dsienna_cichlid_ip_offset.h1072 #define UMC_BASE__INST5_SEG2 0 macro
Dbeige_goby_ip_offset.h1211 #define UMC_BASE__INST5_SEG2 0 macro
Drenoir_ip_offset.h1273 #define UMC_BASE__INST5_SEG2 0 macro
Dvangogh_ip_offset.h1383 #define UMC_BASE__INST5_SEG2 0 macro
Dyellow_carp_offset.h1304 #define UMC_BASE__INST5_SEG2 0 macro
Darct_ip_offset.h1460 #define UMC_BASE__INST5_SEG2 0x00426C00 macro
Daldebaran_ip_offset.h1432 #define UMC_BASE__INST5_SEG2 0 macro