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Searched refs:UMC_BASE__INST1_SEG1 (Results 1 – 13 of 13) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/
Dnavi10_ip_offset.h779 #define UMC_BASE__INST1_SEG1 0 macro
Dvega20_ip_offset.h846 #define UMC_BASE__INST1_SEG1 0 macro
Dnavi14_ip_offset.h998 #define UMC_BASE__INST1_SEG1 0x02425C00 macro
Dnavi12_ip_offset.h998 #define UMC_BASE__INST1_SEG1 0x02425C00 macro
Ddimgrey_cavefish_ip_offset.h957 #define UMC_BASE__INST1_SEG1 0x02425C00 macro
Dsienna_cichlid_ip_offset.h1047 #define UMC_BASE__INST1_SEG1 0x02425C00 macro
Dbeige_goby_ip_offset.h1182 #define UMC_BASE__INST1_SEG1 0x02425C00 macro
Drenoir_ip_offset.h1248 #define UMC_BASE__INST1_SEG1 0x02425C00 macro
Dvega10_ip_offset.h1090 #define UMC_BASE__INST1_SEG1 0 macro
Dvangogh_ip_offset.h1354 #define UMC_BASE__INST1_SEG1 0x02425C00 macro
Dyellow_carp_offset.h1275 #define UMC_BASE__INST1_SEG1 0x000D4000 macro
Darct_ip_offset.h1431 #define UMC_BASE__INST1_SEG1 0x00054000 macro
Daldebaran_ip_offset.h1403 #define UMC_BASE__INST1_SEG1 0x000D4000 macro