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Searched refs:UMC_BASE__INST0_SEG1 (Results 1 – 13 of 13) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/
Dnavi10_ip_offset.h772 #define UMC_BASE__INST0_SEG1 0 macro
Dvega20_ip_offset.h839 #define UMC_BASE__INST0_SEG1 0 macro
Dnavi14_ip_offset.h992 #define UMC_BASE__INST0_SEG1 0x02425800 macro
Dnavi12_ip_offset.h992 #define UMC_BASE__INST0_SEG1 0x02425800 macro
Ddimgrey_cavefish_ip_offset.h950 #define UMC_BASE__INST0_SEG1 0x02425800 macro
Dsienna_cichlid_ip_offset.h1041 #define UMC_BASE__INST0_SEG1 0x02425800 macro
Dbeige_goby_ip_offset.h1175 #define UMC_BASE__INST0_SEG1 0x02425800 macro
Drenoir_ip_offset.h1242 #define UMC_BASE__INST0_SEG1 0x02425800 macro
Dvega10_ip_offset.h1084 #define UMC_BASE__INST0_SEG1 0 macro
Dvangogh_ip_offset.h1347 #define UMC_BASE__INST0_SEG1 0x02425800 macro
Dyellow_carp_offset.h1268 #define UMC_BASE__INST0_SEG1 0x00054000 macro
Darct_ip_offset.h1424 #define UMC_BASE__INST0_SEG1 0x00014000 macro
Daldebaran_ip_offset.h1396 #define UMC_BASE__INST0_SEG1 0x00054000 macro