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Searched refs:UMC_BASE__INST0_SEG0 (Results 1 – 13 of 13) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/
Dnavi10_ip_offset.h771 #define UMC_BASE__INST0_SEG0 0x00014000 macro
Dvega20_ip_offset.h838 #define UMC_BASE__INST0_SEG0 0x00014000 macro
Dnavi14_ip_offset.h991 #define UMC_BASE__INST0_SEG0 0x00014000 macro
Dnavi12_ip_offset.h991 #define UMC_BASE__INST0_SEG0 0x00014000 macro
Ddimgrey_cavefish_ip_offset.h949 #define UMC_BASE__INST0_SEG0 0x00014000 macro
Dsienna_cichlid_ip_offset.h1040 #define UMC_BASE__INST0_SEG0 0x00014000 macro
Dbeige_goby_ip_offset.h1174 #define UMC_BASE__INST0_SEG0 0x00014000 macro
Drenoir_ip_offset.h1241 #define UMC_BASE__INST0_SEG0 0x00014000 macro
Dvega10_ip_offset.h1083 #define UMC_BASE__INST0_SEG0 0x00014000 macro
Dvangogh_ip_offset.h1346 #define UMC_BASE__INST0_SEG0 0x00014000 macro
Dyellow_carp_offset.h1267 #define UMC_BASE__INST0_SEG0 0x00014000 macro
Darct_ip_offset.h1423 #define UMC_BASE__INST0_SEG0 0x000132C0 macro
Daldebaran_ip_offset.h1395 #define UMC_BASE__INST0_SEG0 0x00014000 macro