1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * driver for the SAA7146 based AV110 cards (like the Fujitsu-Siemens DVB)
4 * - initialization and demux stuff
5 *
6 * Copyright (C) 1999-2002 Ralph Metzler
7 * & Marcus Metzler for convergence integrated media GmbH
8 *
9 * originally based on code by:
10 * Copyright (C) 1998,1999 Christian Theiss <mistert@rz.fh-augsburg.de>
11 *
12 * the project's page is at https://linuxtv.org
13 */
14
15 #include <linux/module.h>
16 #include <linux/kmod.h>
17 #include <linux/delay.h>
18 #include <linux/fs.h>
19 #include <linux/timer.h>
20 #include <linux/poll.h>
21
22 #include <linux/kernel.h>
23 #include <linux/sched.h>
24 #include <linux/types.h>
25 #include <linux/fcntl.h>
26 #include <linux/interrupt.h>
27 #include <linux/string.h>
28 #include <linux/pci.h>
29 #include <linux/vmalloc.h>
30 #include <linux/firmware.h>
31 #include <linux/crc32.h>
32 #include <linux/i2c.h>
33 #include <linux/kthread.h>
34 #include <linux/slab.h>
35 #include <linux/unaligned.h>
36 #include <asm/byteorder.h>
37
38 #include <linux/dvb/frontend.h>
39
40 #include <media/dvb_frontend.h>
41
42 #include "ttpci-eeprom.h"
43 #include "av7110.h"
44 #include "av7110_hw.h"
45 #include "av7110_av.h"
46 #include "av7110_ca.h"
47 #include "av7110_ipack.h"
48
49 #include "bsbe1.h"
50 #include "lnbp21.h"
51 #include "bsru6.h"
52
53 #define TS_WIDTH 376
54 #define TS_HEIGHT 512
55 #define TS_BUFLEN (TS_WIDTH * TS_HEIGHT)
56 #define TS_MAX_PACKETS (TS_BUFLEN / TS_SIZE)
57
58 int av7110_debug;
59
60 static int vidmode = CVBS_RGB_OUT;
61 static int pids_off;
62 static int adac = DVB_ADAC_TI;
63 static int hw_sections;
64 static int rgb_on;
65 static int volume = 255;
66 static int budgetpatch;
67 static int wss_cfg_4_3 = 0x4008;
68 static int wss_cfg_16_9 = 0x0007;
69 static int tv_standard;
70 static int full_ts;
71
72 module_param_named(debug, av7110_debug, int, 0644);
73 MODULE_PARM_DESC(debug, "debug level (bitmask, default 0)");
74 module_param(vidmode, int, 0444);
75 MODULE_PARM_DESC(vidmode, "analog video out: 0 off, 1 CVBS+RGB (default), 2 CVBS+YC, 3 YC");
76 module_param(pids_off, int, 0444);
77 MODULE_PARM_DESC(pids_off, "clear video/audio/PCR PID filters when demux is closed");
78 module_param(adac, int, 0444);
79 MODULE_PARM_DESC(adac, "audio DAC type: 0 TI, 1 CRYSTAL, 2 MSP (use if autodetection fails)");
80 module_param(hw_sections, int, 0444);
81 MODULE_PARM_DESC(hw_sections, "0 use software section filter, 1 use hardware");
82 module_param(rgb_on, int, 0444);
83 MODULE_PARM_DESC(rgb_on, "For Siemens DVB-C cards only: Enable RGB control signal on SCART pin 16 to switch SCART video mode from CVBS to RGB");
84 module_param(volume, int, 0444);
85 MODULE_PARM_DESC(volume, "initial volume: default 255 (range 0-255)");
86 module_param(budgetpatch, int, 0444);
87 MODULE_PARM_DESC(budgetpatch, "use budget-patch hardware modification: default 0 (0 no, 1 autodetect, 2 always)");
88 module_param(full_ts, int, 0444);
89 MODULE_PARM_DESC(full_ts, "enable code for full-ts hardware modification: 0 disable (default), 1 enable");
90 module_param(wss_cfg_4_3, int, 0444);
91 MODULE_PARM_DESC(wss_cfg_4_3, "WSS 4:3 - default 0x4008 - bit 15: disable, 14: burst mode, 13..0: wss data");
92 module_param(wss_cfg_16_9, int, 0444);
93 MODULE_PARM_DESC(wss_cfg_16_9, "WSS 16:9 - default 0x0007 - bit 15: disable, 14: burst mode, 13..0: wss data");
94 module_param(tv_standard, int, 0444);
95 MODULE_PARM_DESC(tv_standard, "TV standard: 0 PAL (default), 1 NTSC");
96
97 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
98
99 static void restart_feeds(struct av7110 *av7110);
100 static int budget_start_feed(struct dvb_demux_feed *feed);
101 static int budget_stop_feed(struct dvb_demux_feed *feed);
102
103 static int av7110_num;
104
105 #define FE_FUNC_OVERRIDE(fe_func, av7110_copy, av7110_func) \
106 {\
107 if (fe_func) { \
108 av7110_copy = fe_func; \
109 fe_func = av7110_func; \
110 } \
111 } /* Macro argument reuse of 'fe_func' is intentional! */
112
init_av7110_av(struct av7110 * av7110)113 static void init_av7110_av(struct av7110 *av7110)
114 {
115 int ret;
116 struct saa7146_dev *dev = av7110->dev;
117
118 /* set internal volume control to maximum */
119 av7110->adac_type = DVB_ADAC_TI;
120 ret = av7110_set_volume(av7110, av7110->mixer.volume_left, av7110->mixer.volume_right);
121 if (ret < 0)
122 pr_err("cannot set internal volume to maximum:%d\n", ret);
123
124 ret = av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetMonitorType,
125 1, (u16)av7110->display_ar);
126 if (ret < 0)
127 pr_err("unable to set aspect ratio\n");
128 ret = av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetPanScanType,
129 1, av7110->display_panscan);
130 if (ret < 0)
131 pr_err("unable to set pan scan\n");
132
133 ret = av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetWSSConfig, 2, 2, wss_cfg_4_3);
134 if (ret < 0)
135 pr_err("unable to configure 4:3 wss\n");
136 ret = av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetWSSConfig, 2, 3, wss_cfg_16_9);
137 if (ret < 0)
138 pr_err("unable to configure 16:9 wss\n");
139
140 ret = av7710_set_video_mode(av7110, vidmode);
141 if (ret < 0)
142 pr_err("cannot set video mode:%d\n", ret);
143
144 /* handle different card types */
145 /* remaining inits according to card and frontend type */
146 av7110->analog_tuner_flags = 0;
147 av7110->current_input = 0;
148 if (dev->pci->subsystem_vendor == 0x13c2 && dev->pci->subsystem_device == 0x000a)
149 av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, ADSwitch, 1, 0); // SPDIF on
150 if (i2c_writereg(av7110, 0x20, 0x00, 0x00) == 1) {
151 pr_info("Crystal audio DAC @ card %d detected\n", av7110->dvb_adapter.num);
152 av7110->adac_type = DVB_ADAC_CRYSTAL;
153 i2c_writereg(av7110, 0x20, 0x01, 0xd2);
154 i2c_writereg(av7110, 0x20, 0x02, 0x49);
155 i2c_writereg(av7110, 0x20, 0x03, 0x00);
156 i2c_writereg(av7110, 0x20, 0x04, 0x00);
157
158 /**
159 * some special handling for the Siemens DVB-C cards...
160 */
161 } else if (av7110_init_analog_module(av7110) == 0) {
162 /* done. */
163 } else if (dev->pci->subsystem_vendor == 0x110a) {
164 pr_info("DVB-C w/o analog module @ card %d detected\n", av7110->dvb_adapter.num);
165 av7110->adac_type = DVB_ADAC_NONE;
166 } else {
167 av7110->adac_type = adac;
168 pr_info("adac type set to %d @ card %d\n", av7110->adac_type, av7110->dvb_adapter.num);
169 }
170
171 if (av7110->adac_type == DVB_ADAC_NONE || av7110->adac_type == DVB_ADAC_MSP34x0) {
172 // switch DVB SCART on
173 ret = av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, MainSwitch, 1, 0);
174 if (ret < 0)
175 pr_err("cannot switch on SCART(Main):%d\n", ret);
176 ret = av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, ADSwitch, 1, 1);
177 if (ret < 0)
178 pr_err("cannot switch on SCART(AD):%d\n", ret);
179 if (rgb_on &&
180 ((av7110->dev->pci->subsystem_vendor == 0x110a) ||
181 (av7110->dev->pci->subsystem_vendor == 0x13c2)) &&
182 (av7110->dev->pci->subsystem_device == 0x0000)) {
183 saa7146_setgpio(dev, 1, SAA7146_GPIO_OUTHI); // RGB on, SCART pin 16
184 //saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO); // SCARTpin 8
185 }
186 }
187
188 if (dev->pci->subsystem_vendor == 0x13c2 && dev->pci->subsystem_device == 0x000e)
189 av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, SpdifSwitch, 1, 0); // SPDIF on
190
191 ret = av7110_set_volume(av7110, av7110->mixer.volume_left, av7110->mixer.volume_right);
192 if (ret < 0)
193 pr_err("cannot set volume :%d\n", ret);
194 }
195
recover_arm(struct av7110 * av7110)196 static void recover_arm(struct av7110 *av7110)
197 {
198 dprintk(4, "%p\n", av7110);
199
200 av7110_bootarm(av7110);
201 msleep(100);
202
203 init_av7110_av(av7110);
204
205 /* card-specific recovery */
206 if (av7110->recover)
207 av7110->recover(av7110);
208
209 restart_feeds(av7110);
210
211 #if IS_ENABLED(CONFIG_DVB_AV7110_IR)
212 av7110_set_ir_config(av7110);
213 #endif
214 }
215
av7110_arm_sync(struct av7110 * av7110)216 static void av7110_arm_sync(struct av7110 *av7110)
217 {
218 if (av7110->arm_thread)
219 kthread_stop(av7110->arm_thread);
220
221 av7110->arm_thread = NULL;
222 }
223
arm_thread(void * data)224 static int arm_thread(void *data)
225 {
226 struct av7110 *av7110 = data;
227 u16 newloops = 0;
228 int timeout;
229
230 dprintk(4, "%p\n", av7110);
231
232 for (;;) {
233 timeout = wait_event_interruptible_timeout(av7110->arm_wait,
234 kthread_should_stop(), 5 * HZ);
235
236 if (-ERESTARTSYS == timeout || kthread_should_stop()) {
237 /* got signal or told to quit*/
238 break;
239 }
240
241 if (!av7110->arm_ready)
242 continue;
243
244 if (mutex_lock_interruptible(&av7110->dcomlock))
245 break;
246 newloops = rdebi(av7110, DEBINOSWAP, STATUS_LOOPS, 0, 2);
247 mutex_unlock(&av7110->dcomlock);
248
249 if (newloops == av7110->arm_loops || av7110->arm_errors > 3) {
250 pr_err("ARM crashed @ card %d\n", av7110->dvb_adapter.num);
251
252 recover_arm(av7110);
253
254 if (mutex_lock_interruptible(&av7110->dcomlock))
255 break;
256 newloops = rdebi(av7110, DEBINOSWAP, STATUS_LOOPS, 0, 2) - 1;
257 mutex_unlock(&av7110->dcomlock);
258 }
259 av7110->arm_loops = newloops;
260 av7110->arm_errors = 0;
261 }
262
263 return 0;
264 }
265
266 /****************************************************************************
267 * IRQ handling
268 ****************************************************************************/
269
DvbDmxFilterCallback(u8 * buffer1,size_t buffer1_len,u8 * buffer2,size_t buffer2_len,struct dvb_demux_filter * dvbdmxfilter,struct av7110 * av7110)270 static int DvbDmxFilterCallback(u8 *buffer1, size_t buffer1_len,
271 u8 *buffer2, size_t buffer2_len,
272 struct dvb_demux_filter *dvbdmxfilter,
273 struct av7110 *av7110)
274 {
275 if (!dvbdmxfilter->feed->demux->dmx.frontend)
276 return 0;
277 if (dvbdmxfilter->feed->demux->dmx.frontend->source == DMX_MEMORY_FE)
278 return 0;
279
280 switch (dvbdmxfilter->type) {
281 case DMX_TYPE_SEC:
282 if ((((buffer1[1] << 8) | buffer1[2]) & 0xfff) + 3 != buffer1_len)
283 return 0;
284 if (dvbdmxfilter->doneq) {
285 struct dmx_section_filter *filter = &dvbdmxfilter->filter;
286 int i;
287 u8 xor, neq = 0;
288
289 for (i = 0; i < DVB_DEMUX_MASK_MAX; i++) {
290 xor = filter->filter_value[i] ^ buffer1[i];
291 neq |= dvbdmxfilter->maskandnotmode[i] & xor;
292 }
293 if (!neq)
294 return 0;
295 }
296 return dvbdmxfilter->feed->cb.sec(buffer1, buffer1_len,
297 buffer2, buffer2_len,
298 &dvbdmxfilter->filter, NULL);
299 case DMX_TYPE_TS:
300 if (!(dvbdmxfilter->feed->ts_type & TS_PACKET))
301 return 0;
302 if (dvbdmxfilter->feed->ts_type & TS_PAYLOAD_ONLY)
303 return dvbdmxfilter->feed->cb.ts(buffer1, buffer1_len,
304 buffer2, buffer2_len,
305 &dvbdmxfilter->feed->feed.ts,
306 NULL);
307 else
308 av7110_p2t_write(buffer1, buffer1_len,
309 dvbdmxfilter->feed->pid,
310 &av7110->p2t_filter[dvbdmxfilter->index]);
311 return 0;
312 default:
313 return 0;
314 }
315 }
316
317 //#define DEBUG_TIMING
print_time(char * s)318 static inline void print_time(char *s)
319 {
320 #ifdef DEBUG_TIMING
321 struct timespec64 ts;
322
323 ktime_get_real_ts64(&ts);
324 pr_info("%s(): %lld.%09ld\n", s, (s64)ts.tv_sec, ts.tv_nsec);
325 #endif
326 }
327
328 #define DEBI_READ 0
329 #define DEBI_WRITE 1
start_debi_dma(struct av7110 * av7110,int dir,unsigned long addr,unsigned int len)330 static inline void start_debi_dma(struct av7110 *av7110, int dir,
331 unsigned long addr, unsigned int len)
332 {
333 dprintk(8, "%c %08lx %u\n", dir == DEBI_READ ? 'R' : 'W', addr, len);
334 if (saa7146_wait_for_debi_done(av7110->dev, 0)) {
335 pr_err("%s(): saa7146_wait_for_debi_done timed out\n", __func__);
336 return;
337 }
338
339 SAA7146_ISR_CLEAR(av7110->dev, MASK_19); /* for good measure */
340 SAA7146_IER_ENABLE(av7110->dev, MASK_19);
341 if (len < 5)
342 len = 5; /* we want a real DEBI DMA */
343 if (dir == DEBI_WRITE)
344 iwdebi(av7110, DEBISWAB, addr, 0, (len + 3) & ~3);
345 else
346 irdebi(av7110, DEBISWAB, addr, 0, len);
347 }
348
debiirq(struct tasklet_struct * t)349 static void debiirq(struct tasklet_struct *t)
350 {
351 struct av7110 *av7110 = from_tasklet(av7110, t, debi_tasklet);
352 int type = av7110->debitype;
353 int handle = (type >> 8) & 0x1f;
354 unsigned int xfer = 0;
355
356 print_time("debi");
357 dprintk(4, "type 0x%04x\n", type);
358
359 if (type == -1) {
360 pr_err("DEBI irq oops @ %ld, psr:0x%08x, ssr:0x%08x\n", jiffies,
361 saa7146_read(av7110->dev, PSR), saa7146_read(av7110->dev, SSR));
362 goto debi_done;
363 }
364 av7110->debitype = -1;
365
366 switch (type & 0xff) {
367 case DATA_TS_RECORD:
368 dvb_dmx_swfilter_packets(&av7110->demux,
369 (const u8 *)av7110->debi_virt,
370 av7110->debilen / 188);
371 xfer = RX_BUFF;
372 break;
373
374 case DATA_PES_RECORD:
375 if (av7110->demux.recording)
376 av7110_record_cb(&av7110->p2t[handle],
377 (u8 *)av7110->debi_virt,
378 av7110->debilen);
379 xfer = RX_BUFF;
380 break;
381
382 case DATA_IPMPE:
383 case DATA_FSECTION:
384 case DATA_PIPING:
385 if (av7110->handle2filter[handle])
386 DvbDmxFilterCallback((u8 *)av7110->debi_virt,
387 av7110->debilen, NULL, 0,
388 av7110->handle2filter[handle],
389 av7110);
390 xfer = RX_BUFF;
391 break;
392
393 case DATA_CI_GET:
394 {
395 u8 *data = av7110->debi_virt;
396 u8 data_0 = data[0];
397
398 if (data_0 < 2 && data[2] == 0xff) {
399 int flags = 0;
400
401 if (data[5] > 0)
402 flags |= CA_CI_MODULE_PRESENT;
403 if (data[5] > 5)
404 flags |= CA_CI_MODULE_READY;
405 av7110->ci_slot[data_0].flags = flags;
406 } else {
407 ci_get_data(&av7110->ci_rbuffer,
408 av7110->debi_virt,
409 av7110->debilen);
410 }
411 xfer = RX_BUFF;
412 break;
413 }
414
415 case DATA_COMMON_INTERFACE:
416 CI_handle(av7110, (u8 *)av7110->debi_virt, av7110->debilen);
417 xfer = RX_BUFF;
418 break;
419
420 case DATA_DEBUG_MESSAGE:
421 ((s8 *)av7110->debi_virt)[Reserved_SIZE - 1] = 0;
422 pr_info("%s\n", (s8 *)av7110->debi_virt);
423 xfer = RX_BUFF;
424 break;
425
426 case DATA_CI_PUT:
427 dprintk(4, "debi DATA_CI_PUT\n");
428 xfer = TX_BUFF;
429 break;
430 case DATA_MPEG_PLAY:
431 dprintk(4, "debi DATA_MPEG_PLAY\n");
432 xfer = TX_BUFF;
433 break;
434 case DATA_BMP_LOAD:
435 dprintk(4, "debi DATA_BMP_LOAD\n");
436 xfer = TX_BUFF;
437 break;
438 default:
439 break;
440 }
441 debi_done:
442 spin_lock(&av7110->debilock);
443 if (xfer)
444 iwdebi(av7110, DEBINOSWAP, xfer, 0, 2);
445 ARM_ClearMailBox(av7110);
446 spin_unlock(&av7110->debilock);
447 }
448
449 /* irq from av7110 firmware writing the mailbox register in the DPRAM */
gpioirq(struct tasklet_struct * t)450 static void gpioirq(struct tasklet_struct *t)
451 {
452 struct av7110 *av7110 = from_tasklet(av7110, t, gpio_tasklet);
453 u32 rxbuf, txbuf;
454 int len;
455
456 if (av7110->debitype != -1)
457 /* we shouldn't get any irq while a debi xfer is running */
458 pr_err("GPIO0 irq oops @ %ld, psr:0x%08x, ssr:0x%08x\n", jiffies,
459 saa7146_read(av7110->dev, PSR), saa7146_read(av7110->dev, SSR));
460
461 if (saa7146_wait_for_debi_done(av7110->dev, 0)) {
462 pr_err("%s(): saa7146_wait_for_debi_done timed out\n", __func__);
463 BUG(); /* maybe we should try resetting the debi? */
464 }
465
466 spin_lock(&av7110->debilock);
467 ARM_ClearIrq(av7110);
468
469 /* see what the av7110 wants */
470 av7110->debitype = irdebi(av7110, DEBINOSWAP, IRQ_STATE, 0, 2);
471 av7110->debilen = irdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
472 rxbuf = irdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
473 txbuf = irdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
474 len = (av7110->debilen + 3) & ~3;
475
476 print_time("gpio");
477 dprintk(8, "GPIO0 irq 0x%04x %d\n", av7110->debitype, av7110->debilen);
478
479 switch (av7110->debitype & 0xff) {
480 case DATA_TS_PLAY:
481 case DATA_PES_PLAY:
482 break;
483
484 case DATA_MPEG_VIDEO_EVENT:
485 {
486 u32 h_ar;
487 struct video_event event;
488
489 av7110->video_size.w = irdebi(av7110, DEBINOSWAP, STATUS_MPEG_WIDTH, 0, 2);
490 h_ar = irdebi(av7110, DEBINOSWAP, STATUS_MPEG_HEIGHT_AR, 0, 2);
491
492 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
493 iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
494
495 av7110->video_size.h = h_ar & 0xfff;
496
497 event.type = VIDEO_EVENT_SIZE_CHANGED;
498 event.u.size.w = av7110->video_size.w;
499 event.u.size.h = av7110->video_size.h;
500 switch ((h_ar >> 12) & 0xf) {
501 case 3:
502 av7110->video_size.aspect_ratio = VIDEO_FORMAT_16_9;
503 event.u.size.aspect_ratio = VIDEO_FORMAT_16_9;
504 av7110->videostate.video_format = VIDEO_FORMAT_16_9;
505 break;
506 case 4:
507 av7110->video_size.aspect_ratio = VIDEO_FORMAT_221_1;
508 event.u.size.aspect_ratio = VIDEO_FORMAT_221_1;
509 av7110->videostate.video_format = VIDEO_FORMAT_221_1;
510 break;
511 default:
512 av7110->video_size.aspect_ratio = VIDEO_FORMAT_4_3;
513 event.u.size.aspect_ratio = VIDEO_FORMAT_4_3;
514 av7110->videostate.video_format = VIDEO_FORMAT_4_3;
515 }
516
517 dprintk(8, "GPIO0 irq: DATA_MPEG_VIDEO_EVENT: w/h/ar = %u/%u/%u\n",
518 av7110->video_size.w, av7110->video_size.h,
519 av7110->video_size.aspect_ratio);
520
521 dvb_video_add_event(av7110, &event);
522 break;
523 }
524
525 case DATA_CI_PUT:
526 {
527 int avail;
528 struct dvb_ringbuffer *cibuf = &av7110->ci_wbuffer;
529
530 avail = dvb_ringbuffer_avail(cibuf);
531 if (avail <= 2) {
532 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
533 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
534 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
535 break;
536 }
537 len = DVB_RINGBUFFER_PEEK(cibuf, 0) << 8;
538 len |= DVB_RINGBUFFER_PEEK(cibuf, 1);
539 if (avail < len + 2) {
540 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
541 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
542 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
543 break;
544 }
545 DVB_RINGBUFFER_SKIP(cibuf, 2);
546
547 dvb_ringbuffer_read(cibuf, av7110->debi_virt, len);
548
549 iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2);
550 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2);
551 dprintk(8, "DMA: CI\n");
552 start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE + txbuf, len);
553 spin_unlock(&av7110->debilock);
554 wake_up(&cibuf->queue);
555 return;
556 }
557
558 case DATA_MPEG_PLAY:
559 if (!av7110->playing) {
560 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
561 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
562 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
563 break;
564 }
565 len = 0;
566 if (av7110->debitype & 0x100) {
567 spin_lock(&av7110->aout.lock);
568 len = av7110_pes_play(av7110->debi_virt, &av7110->aout, 2048);
569 spin_unlock(&av7110->aout.lock);
570 }
571 if (len <= 0 && (av7110->debitype & 0x200) &&
572 av7110->videostate.play_state != VIDEO_FREEZED) {
573 spin_lock(&av7110->avout.lock);
574 len = av7110_pes_play(av7110->debi_virt, &av7110->avout, 2048);
575 spin_unlock(&av7110->avout.lock);
576 }
577 if (len <= 0) {
578 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
579 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
580 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
581 break;
582 }
583 dprintk(8, "GPIO0 PES_PLAY len=%04x\n", len);
584 iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2);
585 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2);
586 dprintk(8, "DMA: MPEG_PLAY\n");
587 start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE + txbuf, len);
588 spin_unlock(&av7110->debilock);
589 return;
590
591 case DATA_BMP_LOAD:
592 len = av7110->debilen;
593 dprintk(8, "gpio DATA_BMP_LOAD len %d\n", len);
594 if (!len) {
595 av7110->bmp_state = BMP_LOADED;
596 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
597 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
598 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
599 wake_up(&av7110->bmpq);
600 dprintk(8, "gpio DATA_BMP_LOAD done\n");
601 break;
602 }
603 if (len > av7110->bmplen)
604 len = av7110->bmplen;
605 if (len > 2 * 1024)
606 len = 2 * 1024;
607 iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2);
608 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2);
609 memcpy(av7110->debi_virt, av7110->bmpbuf + av7110->bmpp, len);
610 av7110->bmpp += len;
611 av7110->bmplen -= len;
612 dprintk(8, "gpio DATA_BMP_LOAD DMA len %d\n", len);
613 start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE + txbuf, len);
614 spin_unlock(&av7110->debilock);
615 return;
616
617 case DATA_CI_GET:
618 case DATA_COMMON_INTERFACE:
619 case DATA_FSECTION:
620 case DATA_IPMPE:
621 case DATA_PIPING:
622 if (!len || len > 4 * 1024) {
623 iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
624 break;
625 }
626 fallthrough;
627
628 case DATA_TS_RECORD:
629 case DATA_PES_RECORD:
630 dprintk(8, "DMA: TS_REC etc.\n");
631 start_debi_dma(av7110, DEBI_READ, DPRAM_BASE + rxbuf, len);
632 spin_unlock(&av7110->debilock);
633 return;
634
635 case DATA_DEBUG_MESSAGE:
636 if (!len || len > 0xff) {
637 iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
638 break;
639 }
640 start_debi_dma(av7110, DEBI_READ, Reserved, len);
641 spin_unlock(&av7110->debilock);
642 return;
643
644 case DATA_IRCOMMAND:
645 #if IS_ENABLED(CONFIG_DVB_AV7110_IR)
646 av7110_ir_handler(av7110,
647 swahw32(irdebi(av7110, DEBINOSWAP, Reserved,
648 0, 4)));
649 #endif
650 iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
651 break;
652
653 default:
654 pr_err("%s(): unknown irq: type=%d len=%d\n", __func__,
655 av7110->debitype, av7110->debilen);
656 break;
657 }
658 av7110->debitype = -1;
659 ARM_ClearMailBox(av7110);
660 spin_unlock(&av7110->debilock);
661 }
662
663 #ifdef CONFIG_DVB_AV7110_OSD
dvb_osd_ioctl(struct file * file,unsigned int cmd,void * parg)664 static int dvb_osd_ioctl(struct file *file,
665 unsigned int cmd, void *parg)
666 {
667 struct dvb_device *dvbdev = file->private_data;
668 struct av7110 *av7110 = dvbdev->priv;
669
670 dprintk(4, "%p\n", av7110);
671
672 if (cmd == OSD_SEND_CMD)
673 return av7110_osd_cmd(av7110, (osd_cmd_t *)parg);
674 if (cmd == OSD_GET_CAPABILITY)
675 return av7110_osd_capability(av7110, (osd_cap_t *)parg);
676
677 return -EINVAL;
678 }
679
680 static const struct file_operations dvb_osd_fops = {
681 .owner = THIS_MODULE,
682 .unlocked_ioctl = dvb_generic_ioctl,
683 .open = dvb_generic_open,
684 .release = dvb_generic_release,
685 .llseek = noop_llseek,
686 };
687
688 static struct dvb_device dvbdev_osd = {
689 .priv = NULL,
690 .users = 1,
691 .writers = 1,
692 .fops = &dvb_osd_fops,
693 .kernel_ioctl = dvb_osd_ioctl,
694 };
695 #endif /* CONFIG_DVB_AV7110_OSD */
696
SetPIDs(struct av7110 * av7110,u16 vpid,u16 apid,u16 ttpid,u16 subpid,u16 pcrpid)697 static inline int SetPIDs(struct av7110 *av7110, u16 vpid, u16 apid, u16 ttpid,
698 u16 subpid, u16 pcrpid)
699 {
700 u16 aflags = 0;
701
702 dprintk(4, "%p\n", av7110);
703
704 if (vpid == 0x1fff || apid == 0x1fff ||
705 ttpid == 0x1fff || subpid == 0x1fff || pcrpid == 0x1fff) {
706 vpid = 0;
707 apid = 0;
708 ttpid = 0;
709 subpid = 0;
710 pcrpid = 0;
711 av7110->pids[DMX_PES_VIDEO] = 0;
712 av7110->pids[DMX_PES_AUDIO] = 0;
713 av7110->pids[DMX_PES_TELETEXT] = 0;
714 av7110->pids[DMX_PES_PCR] = 0;
715 }
716
717 if (av7110->audiostate.bypass_mode)
718 aflags |= 0x8000;
719
720 return av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, MultiPID, 6,
721 pcrpid, vpid, apid, ttpid, subpid, aflags);
722 }
723
ChangePIDs(struct av7110 * av7110,u16 vpid,u16 apid,u16 ttpid,u16 subpid,u16 pcrpid)724 int ChangePIDs(struct av7110 *av7110, u16 vpid, u16 apid, u16 ttpid,
725 u16 subpid, u16 pcrpid)
726 {
727 int ret = 0;
728
729 dprintk(4, "%p\n", av7110);
730
731 if (mutex_lock_interruptible(&av7110->pid_mutex))
732 return -ERESTARTSYS;
733
734 if (!(vpid & 0x8000))
735 av7110->pids[DMX_PES_VIDEO] = vpid;
736 if (!(apid & 0x8000))
737 av7110->pids[DMX_PES_AUDIO] = apid;
738 if (!(ttpid & 0x8000))
739 av7110->pids[DMX_PES_TELETEXT] = ttpid;
740 if (!(pcrpid & 0x8000))
741 av7110->pids[DMX_PES_PCR] = pcrpid;
742
743 av7110->pids[DMX_PES_SUBTITLE] = 0;
744
745 if (av7110->fe_synced) {
746 pcrpid = av7110->pids[DMX_PES_PCR];
747 ret = SetPIDs(av7110, vpid, apid, ttpid, subpid, pcrpid);
748 }
749
750 mutex_unlock(&av7110->pid_mutex);
751 return ret;
752 }
753
754 /******************************************************************************
755 * hardware filter functions
756 ******************************************************************************/
757
StartHWFilter(struct dvb_demux_filter * dvbdmxfilter)758 static int StartHWFilter(struct dvb_demux_filter *dvbdmxfilter)
759 {
760 struct dvb_demux_feed *dvbdmxfeed = dvbdmxfilter->feed;
761 struct av7110 *av7110 = dvbdmxfeed->demux->priv;
762 u16 buf[20];
763 int ret, i;
764 u16 handle;
765 // u16 mode = 0x0320;
766 u16 mode = 0xb96a;
767
768 dprintk(4, "%p\n", av7110);
769
770 if (av7110->full_ts)
771 return 0;
772
773 if (dvbdmxfilter->type == DMX_TYPE_SEC) {
774 if (hw_sections) {
775 buf[4] = (dvbdmxfilter->filter.filter_value[0] << 8) |
776 dvbdmxfilter->maskandmode[0];
777 for (i = 3; i < 18; i++)
778 buf[i + 4 - 2] =
779 (dvbdmxfilter->filter.filter_value[i] << 8) |
780 dvbdmxfilter->maskandmode[i];
781 mode = 4;
782 }
783 } else if ((dvbdmxfeed->ts_type & TS_PACKET) &&
784 !(dvbdmxfeed->ts_type & TS_PAYLOAD_ONLY)) {
785 av7110_p2t_init(&av7110->p2t_filter[dvbdmxfilter->index], dvbdmxfeed);
786 }
787
788 buf[0] = (COMTYPE_PID_FILTER << 8) + AddPIDFilter;
789 buf[1] = 16;
790 buf[2] = dvbdmxfeed->pid;
791 buf[3] = mode;
792
793 ret = av7110_fw_request(av7110, buf, 20, &handle, 1);
794 if (ret != 0 || handle >= 32) {
795 pr_err("%s(): error buf %04x %04x %04x %04x ret %d handle %04x\n",
796 __func__, buf[0], buf[1], buf[2], buf[3], ret, handle);
797 dvbdmxfilter->hw_handle = 0xffff;
798 if (!ret)
799 ret = -1;
800 return ret;
801 }
802
803 av7110->handle2filter[handle] = dvbdmxfilter;
804 dvbdmxfilter->hw_handle = handle;
805
806 return ret;
807 }
808
StopHWFilter(struct dvb_demux_filter * dvbdmxfilter)809 static int StopHWFilter(struct dvb_demux_filter *dvbdmxfilter)
810 {
811 struct av7110 *av7110 = dvbdmxfilter->feed->demux->priv;
812 u16 buf[3];
813 u16 answ[2];
814 int ret;
815 u16 handle;
816
817 dprintk(4, "%p\n", av7110);
818
819 if (av7110->full_ts)
820 return 0;
821
822 handle = dvbdmxfilter->hw_handle;
823 if (handle >= 32) {
824 pr_err("%s(): tried to stop invalid filter %04x, filter type = %x\n",
825 __func__, handle, dvbdmxfilter->type);
826 return -EINVAL;
827 }
828
829 av7110->handle2filter[handle] = NULL;
830
831 buf[0] = (COMTYPE_PID_FILTER << 8) + DelPIDFilter;
832 buf[1] = 1;
833 buf[2] = handle;
834 ret = av7110_fw_request(av7110, buf, 3, answ, 2);
835 if (ret != 0 || answ[1] != handle) {
836 pr_err("%s(): error cmd %04x %04x %04x ret %x resp %04x %04x pid %d\n", __func__,
837 buf[0], buf[1], buf[2], ret, answ[0], answ[1], dvbdmxfilter->feed->pid);
838 if (!ret)
839 ret = -1;
840 }
841 return ret;
842 }
843
dvb_feed_start_pid(struct dvb_demux_feed * dvbdmxfeed)844 static int dvb_feed_start_pid(struct dvb_demux_feed *dvbdmxfeed)
845 {
846 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
847 struct av7110 *av7110 = dvbdmx->priv;
848 u16 *pid = dvbdmx->pids, npids[5];
849 int i;
850 int ret = 0;
851
852 dprintk(4, "%p\n", av7110);
853
854 npids[0] = 0xffff;
855 npids[1] = 0xffff;
856 npids[2] = 0xffff;
857 npids[3] = 0xffff;
858 npids[4] = 0xffff;
859 i = dvbdmxfeed->pes_type;
860 npids[i] = (pid[i] & 0x8000) ? 0 : pid[i];
861 if ((i == 2) && npids[i] && (dvbdmxfeed->ts_type & TS_PACKET)) {
862 npids[i] = 0;
863 ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]);
864 if (!ret)
865 ret = StartHWFilter(dvbdmxfeed->filter);
866 return ret;
867 }
868 if (dvbdmxfeed->pes_type <= 2 || dvbdmxfeed->pes_type == 4) {
869 ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]);
870 if (ret)
871 return ret;
872 }
873
874 if (dvbdmxfeed->pes_type < 2 && npids[0])
875 if (av7110->fe_synced) {
876 ret = av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, Scan, 0);
877 if (ret)
878 return ret;
879 }
880
881 if ((dvbdmxfeed->ts_type & TS_PACKET) && !av7110->full_ts) {
882 if (dvbdmxfeed->pes_type == 0 && !(dvbdmx->pids[0] & 0x8000))
883 ret = av7110_av_start_record(av7110, RP_AUDIO, dvbdmxfeed);
884 if (dvbdmxfeed->pes_type == 1 && !(dvbdmx->pids[1] & 0x8000))
885 ret = av7110_av_start_record(av7110, RP_VIDEO, dvbdmxfeed);
886 }
887 return ret;
888 }
889
dvb_feed_stop_pid(struct dvb_demux_feed * dvbdmxfeed)890 static int dvb_feed_stop_pid(struct dvb_demux_feed *dvbdmxfeed)
891 {
892 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
893 struct av7110 *av7110 = dvbdmx->priv;
894 u16 *pid = dvbdmx->pids, npids[5];
895 int i;
896
897 int ret = 0;
898
899 dprintk(4, "%p\n", av7110);
900
901 if (dvbdmxfeed->pes_type <= 1) {
902 ret = av7110_av_stop(av7110, dvbdmxfeed->pes_type ? RP_VIDEO : RP_AUDIO);
903 if (ret)
904 return ret;
905 if (!av7110->rec_mode)
906 dvbdmx->recording = 0;
907 if (!av7110->playing)
908 dvbdmx->playing = 0;
909 }
910 npids[0] = 0xffff;
911 npids[1] = 0xffff;
912 npids[2] = 0xffff;
913 npids[3] = 0xffff;
914 npids[4] = 0xffff;
915 i = dvbdmxfeed->pes_type;
916 switch (i) {
917 case 2: //teletext
918 if (dvbdmxfeed->ts_type & TS_PACKET)
919 ret = StopHWFilter(dvbdmxfeed->filter);
920 npids[2] = 0;
921 break;
922 case 0:
923 case 1:
924 case 4:
925 if (!pids_off)
926 return 0;
927 npids[i] = (pid[i] & 0x8000) ? 0 : pid[i];
928 break;
929 }
930 if (!ret)
931 ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]);
932 return ret;
933 }
934
av7110_start_feed(struct dvb_demux_feed * feed)935 static int av7110_start_feed(struct dvb_demux_feed *feed)
936 {
937 struct dvb_demux *demux = feed->demux;
938 struct av7110 *av7110 = demux->priv;
939 int ret = 0;
940
941 dprintk(4, "%p\n", av7110);
942
943 if (!demux->dmx.frontend)
944 return -EINVAL;
945
946 if (!av7110->full_ts && feed->pid > 0x1fff)
947 return -EINVAL;
948
949 if (feed->type == DMX_TYPE_TS) {
950 if ((feed->ts_type & TS_DECODER) &&
951 (feed->pes_type <= DMX_PES_PCR)) {
952 switch (demux->dmx.frontend->source) {
953 case DMX_MEMORY_FE:
954 if (feed->ts_type & TS_DECODER)
955 if (feed->pes_type < 2 &&
956 !(demux->pids[0] & 0x8000) &&
957 !(demux->pids[1] & 0x8000)) {
958 dvb_ringbuffer_flush_spinlock_wakeup(&av7110->avout);
959 dvb_ringbuffer_flush_spinlock_wakeup(&av7110->aout);
960 ret = av7110_av_start_play(av7110, RP_AV);
961 if (!ret)
962 demux->playing = 1;
963 }
964 break;
965 default:
966 ret = dvb_feed_start_pid(feed);
967 break;
968 }
969 } else if ((feed->ts_type & TS_PACKET) &&
970 (demux->dmx.frontend->source != DMX_MEMORY_FE)) {
971 ret = StartHWFilter(feed->filter);
972 }
973 }
974
975 if (av7110->full_ts) {
976 budget_start_feed(feed);
977 return ret;
978 }
979
980 if (feed->type == DMX_TYPE_SEC) {
981 int i;
982
983 for (i = 0; i < demux->filternum; i++) {
984 if (demux->filter[i].state != DMX_STATE_READY)
985 continue;
986 if (demux->filter[i].type != DMX_TYPE_SEC)
987 continue;
988 if (demux->filter[i].filter.parent != &feed->feed.sec)
989 continue;
990 demux->filter[i].state = DMX_STATE_GO;
991 if (demux->dmx.frontend->source != DMX_MEMORY_FE) {
992 ret = StartHWFilter(&demux->filter[i]);
993 if (ret)
994 break;
995 }
996 }
997 }
998
999 return ret;
1000 }
1001
av7110_stop_feed(struct dvb_demux_feed * feed)1002 static int av7110_stop_feed(struct dvb_demux_feed *feed)
1003 {
1004 struct dvb_demux *demux = feed->demux;
1005 struct av7110 *av7110 = demux->priv;
1006 int i, rc, ret = 0;
1007
1008 dprintk(4, "%p\n", av7110);
1009
1010 if (feed->type == DMX_TYPE_TS) {
1011 if (feed->ts_type & TS_DECODER) {
1012 if (feed->pes_type >= DMX_PES_OTHER ||
1013 !demux->pesfilter[feed->pes_type])
1014 return -EINVAL;
1015 demux->pids[feed->pes_type] |= 0x8000;
1016 demux->pesfilter[feed->pes_type] = NULL;
1017 }
1018 if (feed->ts_type & TS_DECODER && feed->pes_type < DMX_PES_OTHER)
1019 ret = dvb_feed_stop_pid(feed);
1020 else
1021 if ((feed->ts_type & TS_PACKET) &&
1022 (demux->dmx.frontend->source != DMX_MEMORY_FE))
1023 ret = StopHWFilter(feed->filter);
1024 }
1025
1026 if (av7110->full_ts) {
1027 budget_stop_feed(feed);
1028 return ret;
1029 }
1030
1031 if (feed->type == DMX_TYPE_SEC) {
1032 for (i = 0; i < demux->filternum; i++) {
1033 if (demux->filter[i].state == DMX_STATE_GO &&
1034 demux->filter[i].filter.parent == &feed->feed.sec) {
1035 demux->filter[i].state = DMX_STATE_READY;
1036 if (demux->dmx.frontend->source != DMX_MEMORY_FE) {
1037 rc = StopHWFilter(&demux->filter[i]);
1038 if (!ret)
1039 ret = rc;
1040 /* keep going, stop as many filters as possible */
1041 }
1042 }
1043 }
1044 }
1045
1046 return ret;
1047 }
1048
restart_feeds(struct av7110 * av7110)1049 static void restart_feeds(struct av7110 *av7110)
1050 {
1051 struct dvb_demux *dvbdmx = &av7110->demux;
1052 struct dvb_demux_feed *feed;
1053 int mode;
1054 int feeding;
1055 int i, j;
1056
1057 dprintk(4, "%p\n", av7110);
1058
1059 mode = av7110->playing;
1060 av7110->playing = 0;
1061 av7110->rec_mode = 0;
1062
1063 feeding = av7110->feeding1; /* full_ts mod */
1064
1065 for (i = 0; i < dvbdmx->feednum; i++) {
1066 feed = &dvbdmx->feed[i];
1067 if (feed->state == DMX_STATE_GO) {
1068 if (feed->type == DMX_TYPE_SEC) {
1069 for (j = 0; j < dvbdmx->filternum; j++) {
1070 if (dvbdmx->filter[j].type != DMX_TYPE_SEC)
1071 continue;
1072 if (dvbdmx->filter[j].filter.parent != &feed->feed.sec)
1073 continue;
1074 if (dvbdmx->filter[j].state == DMX_STATE_GO)
1075 dvbdmx->filter[j].state = DMX_STATE_READY;
1076 }
1077 }
1078 av7110_start_feed(feed);
1079 }
1080 }
1081
1082 av7110->feeding1 = feeding; /* full_ts mod */
1083
1084 if (mode)
1085 av7110_av_start_play(av7110, mode);
1086 }
1087
dvb_get_stc(struct dmx_demux * demux,unsigned int num,u64 * stc,unsigned int * base)1088 static int dvb_get_stc(struct dmx_demux *demux, unsigned int num,
1089 u64 *stc, unsigned int *base)
1090 {
1091 int ret;
1092 u16 fwstc[4];
1093 u16 tag = ((COMTYPE_REQUEST << 8) + ReqSTC);
1094 struct dvb_demux *dvbdemux;
1095 struct av7110 *av7110;
1096
1097 /* pointer casting paranoia... */
1098 if (WARN_ON(!demux))
1099 return -EIO;
1100 dvbdemux = demux->priv;
1101 if (WARN_ON(!dvbdemux))
1102 return -EIO;
1103 av7110 = dvbdemux->priv;
1104
1105 dprintk(4, "%p\n", av7110);
1106
1107 if (num != 0)
1108 return -EINVAL;
1109
1110 ret = av7110_fw_request(av7110, &tag, 0, fwstc, 4);
1111 if (ret) {
1112 pr_err("%s(): av7110_fw_request error\n", __func__);
1113 return ret;
1114 }
1115 dprintk(2, "fwstc = %04hx %04hx %04hx %04hx\n", fwstc[0], fwstc[1], fwstc[2], fwstc[3]);
1116
1117 *stc = (((uint64_t)((fwstc[3] & 0x8000) >> 15)) << 32) |
1118 (((uint64_t)fwstc[1]) << 16) | ((uint64_t)fwstc[0]);
1119 *base = 1;
1120
1121 dprintk(4, "stc = %lu\n", (unsigned long)*stc);
1122
1123 return 0;
1124 }
1125
1126 /******************************************************************************
1127 * SEC device file operations
1128 ******************************************************************************/
1129
av7110_set_tone(struct dvb_frontend * fe,enum fe_sec_tone_mode tone)1130 static int av7110_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone)
1131 {
1132 struct av7110 *av7110 = fe->dvb->priv;
1133
1134 switch (tone) {
1135 case SEC_TONE_ON:
1136 return Set22K(av7110, 1);
1137
1138 case SEC_TONE_OFF:
1139 return Set22K(av7110, 0);
1140
1141 default:
1142 return -EINVAL;
1143 }
1144 }
1145
av7110_diseqc_send_master_cmd(struct dvb_frontend * fe,struct dvb_diseqc_master_cmd * cmd)1146 static int av7110_diseqc_send_master_cmd(struct dvb_frontend *fe,
1147 struct dvb_diseqc_master_cmd *cmd)
1148 {
1149 struct av7110 *av7110 = fe->dvb->priv;
1150
1151 return av7110_diseqc_send(av7110, cmd->msg_len, cmd->msg, -1);
1152 }
1153
av7110_diseqc_send_burst(struct dvb_frontend * fe,enum fe_sec_mini_cmd minicmd)1154 static int av7110_diseqc_send_burst(struct dvb_frontend *fe,
1155 enum fe_sec_mini_cmd minicmd)
1156 {
1157 struct av7110 *av7110 = fe->dvb->priv;
1158
1159 return av7110_diseqc_send(av7110, 0, NULL, minicmd);
1160 }
1161
1162 /* simplified code from budget-core.c */
stop_ts_capture(struct av7110 * budget)1163 static int stop_ts_capture(struct av7110 *budget)
1164 {
1165 dprintk(2, "budget: %p\n", budget);
1166
1167 if (--budget->feeding1)
1168 return budget->feeding1;
1169 saa7146_write(budget->dev, MC1, MASK_20); /* DMA3 off */
1170 SAA7146_IER_DISABLE(budget->dev, MASK_10);
1171 SAA7146_ISR_CLEAR(budget->dev, MASK_10);
1172 return 0;
1173 }
1174
start_ts_capture(struct av7110 * budget)1175 static int start_ts_capture(struct av7110 *budget)
1176 {
1177 unsigned int y;
1178
1179 dprintk(2, "budget: %p\n", budget);
1180
1181 if (budget->feeding1)
1182 return ++budget->feeding1;
1183 for (y = 0; y < TS_HEIGHT; y++)
1184 memset(budget->grabbing + y * TS_WIDTH, 0x00, TS_WIDTH);
1185 budget->ttbp = 0;
1186 SAA7146_ISR_CLEAR(budget->dev, MASK_10); /* VPE */
1187 SAA7146_IER_ENABLE(budget->dev, MASK_10); /* VPE */
1188 saa7146_write(budget->dev, MC1, (MASK_04 | MASK_20)); /* DMA3 on */
1189 return ++budget->feeding1;
1190 }
1191
budget_start_feed(struct dvb_demux_feed * feed)1192 static int budget_start_feed(struct dvb_demux_feed *feed)
1193 {
1194 struct dvb_demux *demux = feed->demux;
1195 struct av7110 *budget = demux->priv;
1196 int status;
1197
1198 dprintk(2, "av7110: %p\n", budget);
1199
1200 spin_lock(&budget->feedlock1);
1201 feed->pusi_seen = false; /* have a clean section start */
1202 status = start_ts_capture(budget);
1203 spin_unlock(&budget->feedlock1);
1204 return status;
1205 }
1206
budget_stop_feed(struct dvb_demux_feed * feed)1207 static int budget_stop_feed(struct dvb_demux_feed *feed)
1208 {
1209 struct dvb_demux *demux = feed->demux;
1210 struct av7110 *budget = demux->priv;
1211 int status;
1212
1213 dprintk(2, "budget: %p\n", budget);
1214
1215 spin_lock(&budget->feedlock1);
1216 status = stop_ts_capture(budget);
1217 spin_unlock(&budget->feedlock1);
1218 return status;
1219 }
1220
vpeirq(struct tasklet_struct * t)1221 static void vpeirq(struct tasklet_struct *t)
1222 {
1223 struct av7110 *budget = from_tasklet(budget, t, vpe_tasklet);
1224 u8 *mem = (u8 *)(budget->grabbing);
1225 u32 olddma = budget->ttbp;
1226 u32 newdma = saa7146_read(budget->dev, PCI_VDP3);
1227 struct dvb_demux *demux = budget->full_ts ? &budget->demux : &budget->demux1;
1228
1229 /* nearest lower position divisible by 188 */
1230 newdma -= newdma % 188;
1231
1232 if (newdma >= TS_BUFLEN)
1233 return;
1234
1235 budget->ttbp = newdma;
1236
1237 if (!budget->feeding1 || (newdma == olddma))
1238 return;
1239
1240 /* Ensure streamed PCI data is synced to CPU */
1241 dma_sync_sg_for_cpu(&budget->dev->pci->dev, budget->pt.slist,
1242 budget->pt.nents, DMA_FROM_DEVICE);
1243
1244 #ifdef RPS_DEBUG
1245 /* track rps1 activity */
1246 pr_info("%s(): %02x Event Counter 1 0x%04x\n", __func__, mem[olddma],
1247 saa7146_read(budget->dev, EC1R) & 0x3fff);
1248 #endif
1249
1250 if (newdma > olddma) {
1251 /* no wraparound, dump olddma..newdma */
1252 dvb_dmx_swfilter_packets(demux, mem + olddma, (newdma - olddma) / 188);
1253 } else {
1254 /* wraparound, dump olddma..buflen and 0..newdma */
1255 dvb_dmx_swfilter_packets(demux, mem + olddma, (TS_BUFLEN - olddma) / 188);
1256 dvb_dmx_swfilter_packets(demux, mem, newdma / 188);
1257 }
1258 }
1259
av7110_register(struct av7110 * av7110)1260 static int av7110_register(struct av7110 *av7110)
1261 {
1262 int ret, i;
1263 struct dvb_demux *dvbdemux = &av7110->demux;
1264 struct dvb_demux *dvbdemux1 = &av7110->demux1;
1265
1266 dprintk(4, "%p\n", av7110);
1267
1268 if (av7110->registered)
1269 return -1;
1270
1271 av7110->registered = 1;
1272
1273 dvbdemux->priv = (void *)av7110;
1274
1275 for (i = 0; i < 32; i++)
1276 av7110->handle2filter[i] = NULL;
1277
1278 dvbdemux->filternum = (av7110->full_ts) ? 256 : 32;
1279 dvbdemux->feednum = (av7110->full_ts) ? 256 : 32;
1280 dvbdemux->start_feed = av7110_start_feed;
1281 dvbdemux->stop_feed = av7110_stop_feed;
1282 dvbdemux->write_to_decoder = av7110_write_to_decoder;
1283 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING | DMX_SECTION_FILTERING |
1284 DMX_MEMORY_BASED_FILTERING);
1285
1286 dvb_dmx_init(&av7110->demux);
1287 av7110->demux.dmx.get_stc = dvb_get_stc;
1288
1289 av7110->dmxdev.filternum = (av7110->full_ts) ? 256 : 32;
1290 av7110->dmxdev.demux = &dvbdemux->dmx;
1291 av7110->dmxdev.capabilities = 0;
1292
1293 dvb_dmxdev_init(&av7110->dmxdev, &av7110->dvb_adapter);
1294
1295 av7110->hw_frontend.source = DMX_FRONTEND_0;
1296
1297 ret = dvbdemux->dmx.add_frontend(&dvbdemux->dmx, &av7110->hw_frontend);
1298
1299 if (ret < 0)
1300 return ret;
1301
1302 av7110->mem_frontend.source = DMX_MEMORY_FE;
1303
1304 ret = dvbdemux->dmx.add_frontend(&dvbdemux->dmx, &av7110->mem_frontend);
1305
1306 if (ret < 0)
1307 return ret;
1308
1309 ret = dvbdemux->dmx.connect_frontend(&dvbdemux->dmx,
1310 &av7110->hw_frontend);
1311 if (ret < 0)
1312 return ret;
1313
1314 av7110_av_register(av7110);
1315 av7110_ca_register(av7110);
1316
1317 #ifdef CONFIG_DVB_AV7110_OSD
1318 dvb_register_device(&av7110->dvb_adapter, &av7110->osd_dev,
1319 &dvbdev_osd, av7110, DVB_DEVICE_OSD, 0);
1320 #endif
1321
1322 dvb_net_init(&av7110->dvb_adapter, &av7110->dvb_net, &dvbdemux->dmx);
1323
1324 if (budgetpatch) {
1325 /* initialize software demux1 without its own frontend
1326 * demux1 hardware is connected to frontend0 of demux0
1327 */
1328 dvbdemux1->priv = (void *)av7110;
1329
1330 dvbdemux1->filternum = 256;
1331 dvbdemux1->feednum = 256;
1332 dvbdemux1->start_feed = budget_start_feed;
1333 dvbdemux1->stop_feed = budget_stop_feed;
1334 dvbdemux1->write_to_decoder = NULL;
1335
1336 dvbdemux1->dmx.capabilities = (DMX_TS_FILTERING | DMX_SECTION_FILTERING |
1337 DMX_MEMORY_BASED_FILTERING);
1338
1339 dvb_dmx_init(&av7110->demux1);
1340
1341 av7110->dmxdev1.filternum = 256;
1342 av7110->dmxdev1.demux = &dvbdemux1->dmx;
1343 av7110->dmxdev1.capabilities = 0;
1344
1345 dvb_dmxdev_init(&av7110->dmxdev1, &av7110->dvb_adapter);
1346
1347 dvb_net_init(&av7110->dvb_adapter, &av7110->dvb_net1, &dvbdemux1->dmx);
1348 pr_info("additional demux1 for budget-patch registered\n");
1349 }
1350 return 0;
1351 }
1352
dvb_unregister(struct av7110 * av7110)1353 static void dvb_unregister(struct av7110 *av7110)
1354 {
1355 struct dvb_demux *dvbdemux = &av7110->demux;
1356 struct dvb_demux *dvbdemux1 = &av7110->demux1;
1357
1358 dprintk(4, "%p\n", av7110);
1359
1360 if (!av7110->registered)
1361 return;
1362
1363 if (budgetpatch) {
1364 dvb_net_release(&av7110->dvb_net1);
1365 dvbdemux->dmx.close(&dvbdemux1->dmx);
1366 dvb_dmxdev_release(&av7110->dmxdev1);
1367 dvb_dmx_release(&av7110->demux1);
1368 }
1369
1370 dvb_net_release(&av7110->dvb_net);
1371
1372 dvbdemux->dmx.close(&dvbdemux->dmx);
1373 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &av7110->hw_frontend);
1374 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &av7110->mem_frontend);
1375
1376 dvb_dmxdev_release(&av7110->dmxdev);
1377 dvb_dmx_release(&av7110->demux);
1378
1379 if (av7110->fe) {
1380 dvb_unregister_frontend(av7110->fe);
1381 dvb_frontend_detach(av7110->fe);
1382 }
1383 dvb_unregister_device(av7110->osd_dev);
1384 av7110_av_unregister(av7110);
1385 av7110_ca_unregister(av7110);
1386 }
1387
1388 /****************************************************************************
1389 * I2C client commands
1390 ****************************************************************************/
1391
i2c_writereg(struct av7110 * av7110,u8 id,u8 reg,u8 val)1392 int i2c_writereg(struct av7110 *av7110, u8 id, u8 reg, u8 val)
1393 {
1394 u8 msg[2] = { reg, val };
1395 struct i2c_msg msgs;
1396
1397 msgs.flags = 0;
1398 msgs.addr = id / 2;
1399 msgs.len = 2;
1400 msgs.buf = msg;
1401 return i2c_transfer(&av7110->i2c_adap, &msgs, 1);
1402 }
1403
i2c_readreg(struct av7110 * av7110,u8 id,u8 reg)1404 u8 i2c_readreg(struct av7110 *av7110, u8 id, u8 reg)
1405 {
1406 u8 mm1[] = {0x00};
1407 u8 mm2[] = {0x00};
1408 struct i2c_msg msgs[2];
1409
1410 msgs[0].flags = 0;
1411 msgs[1].flags = I2C_M_RD;
1412 msgs[0].addr = id / 2;
1413 msgs[1].addr = id / 2;
1414 mm1[0] = reg;
1415 msgs[0].len = 1;
1416 msgs[1].len = 1;
1417 msgs[0].buf = mm1;
1418 msgs[1].buf = mm2;
1419 i2c_transfer(&av7110->i2c_adap, msgs, 2);
1420
1421 return mm2[0];
1422 }
1423
1424 /****************************************************************************
1425 * INITIALIZATION
1426 ****************************************************************************/
1427
check_firmware(struct av7110 * av7110)1428 static int check_firmware(struct av7110 *av7110)
1429 {
1430 u32 crc = 0, len = 0;
1431 unsigned char *ptr;
1432
1433 /* check for firmware magic */
1434 ptr = av7110->bin_fw;
1435 if (ptr[0] != 'A' || ptr[1] != 'V' ||
1436 ptr[2] != 'F' || ptr[3] != 'W') {
1437 pr_err("this is not an av7110 firmware\n");
1438 return -EINVAL;
1439 }
1440 ptr += 4;
1441
1442 /* check dpram file */
1443 crc = get_unaligned_be32(ptr);
1444 ptr += 4;
1445 len = get_unaligned_be32(ptr);
1446 ptr += 4;
1447 if (len >= 512) {
1448 pr_err("dpram file is way too big.\n");
1449 return -EINVAL;
1450 }
1451 if (crc != crc32_le(0, ptr, len)) {
1452 pr_err("crc32 of dpram file does not match.\n");
1453 return -EINVAL;
1454 }
1455 av7110->bin_dpram = ptr;
1456 av7110->size_dpram = len;
1457 ptr += len;
1458
1459 /* check root file */
1460 crc = get_unaligned_be32(ptr);
1461 ptr += 4;
1462 len = get_unaligned_be32(ptr);
1463 ptr += 4;
1464
1465 if (len <= 200000 || len >= 300000 ||
1466 len > ((av7110->bin_fw + av7110->size_fw) - ptr)) {
1467 pr_err("root file has strange size (%d). aborting.\n", len);
1468 return -EINVAL;
1469 }
1470 if (crc != crc32_le(0, ptr, len)) {
1471 pr_err("crc32 of root file does not match.\n");
1472 return -EINVAL;
1473 }
1474 av7110->bin_root = ptr;
1475 av7110->size_root = len;
1476 return 0;
1477 }
1478
put_firmware(struct av7110 * av7110)1479 static void put_firmware(struct av7110 *av7110)
1480 {
1481 vfree(av7110->bin_fw);
1482 }
1483
get_firmware(struct av7110 * av7110)1484 static int get_firmware(struct av7110 *av7110)
1485 {
1486 int ret;
1487 const struct firmware *fw;
1488
1489 /* request the av7110 firmware, this will block until someone uploads it */
1490 ret = request_firmware(&fw, "dvb-ttpci-01.fw", &av7110->dev->pci->dev);
1491 if (ret) {
1492 if (ret == -ENOENT) {
1493 pr_err("could not load firmware, file not found: dvb-ttpci-01.fw\n");
1494 pr_err("usually this should be in /usr/lib/hotplug/firmware or /lib/firmware\n");
1495 pr_err("and can be downloaded from https://linuxtv.org/download/dvb/firmware/\n");
1496 } else {
1497 pr_err("cannot request firmware (error %i)\n", ret);
1498 }
1499 return -EINVAL;
1500 }
1501
1502 if (fw->size <= 200000) {
1503 pr_err("this firmware is way too small.\n");
1504 release_firmware(fw);
1505 return -EINVAL;
1506 }
1507
1508 /* check if the firmware is available */
1509 av7110->bin_fw = vmalloc(fw->size);
1510 if (!av7110->bin_fw) {
1511 dprintk(1, "out of memory\n");
1512 release_firmware(fw);
1513 return -ENOMEM;
1514 }
1515
1516 memcpy(av7110->bin_fw, fw->data, fw->size);
1517 av7110->size_fw = fw->size;
1518 ret = check_firmware(av7110);
1519 if (ret)
1520 vfree(av7110->bin_fw);
1521
1522 release_firmware(fw);
1523 return ret;
1524 }
1525
alps_bsrv2_tuner_set_params(struct dvb_frontend * fe)1526 static int alps_bsrv2_tuner_set_params(struct dvb_frontend *fe)
1527 {
1528 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1529 struct av7110 *av7110 = fe->dvb->priv;
1530 u8 pwr = 0;
1531 u8 buf[4];
1532 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) };
1533 u32 div = (p->frequency + 479500) / 125;
1534
1535 if (p->frequency > 2000000)
1536 pwr = 3;
1537 else if (p->frequency > 1800000)
1538 pwr = 2;
1539 else if (p->frequency > 1600000)
1540 pwr = 1;
1541 else if (p->frequency > 1200000)
1542 pwr = 0;
1543 else if (p->frequency >= 1100000)
1544 pwr = 1;
1545 else
1546 pwr = 2;
1547
1548 buf[0] = (div >> 8) & 0x7f;
1549 buf[1] = div & 0xff;
1550 buf[2] = ((div & 0x18000) >> 10) | 0x95;
1551 buf[3] = (pwr << 6) | 0x30;
1552
1553 // NOTE: since we're using a prescaler of 2, we set the
1554 // divisor frequency to 62.5kHz and divide by 125 above
1555
1556 if (fe->ops.i2c_gate_ctrl)
1557 fe->ops.i2c_gate_ctrl(fe, 1);
1558 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
1559 return -EIO;
1560 return 0;
1561 }
1562
1563 static struct ves1x93_config alps_bsrv2_config = {
1564 .demod_address = 0x08,
1565 .xin = 90100000UL,
1566 .invert_pwm = 0,
1567 };
1568
alps_tdbe2_tuner_set_params(struct dvb_frontend * fe)1569 static int alps_tdbe2_tuner_set_params(struct dvb_frontend *fe)
1570 {
1571 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1572 struct av7110 *av7110 = fe->dvb->priv;
1573 u32 div;
1574 u8 data[4];
1575 struct i2c_msg msg = { .addr = 0x62, .flags = 0, .buf = data, .len = sizeof(data) };
1576
1577 div = (p->frequency + 35937500 + 31250) / 62500;
1578
1579 data[0] = (div >> 8) & 0x7f;
1580 data[1] = div & 0xff;
1581 data[2] = 0x85 | ((div >> 10) & 0x60);
1582 data[3] = (p->frequency < 174000000 ? 0x88 : p->frequency < 470000000 ? 0x84 : 0x81);
1583
1584 if (fe->ops.i2c_gate_ctrl)
1585 fe->ops.i2c_gate_ctrl(fe, 1);
1586 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
1587 return -EIO;
1588 return 0;
1589 }
1590
1591 static struct ves1820_config alps_tdbe2_config = {
1592 .demod_address = 0x09,
1593 .xin = 57840000UL,
1594 .invert = 1,
1595 .selagc = VES1820_SELAGC_SIGNAMPERR,
1596 };
1597
grundig_29504_451_tuner_set_params(struct dvb_frontend * fe)1598 static int grundig_29504_451_tuner_set_params(struct dvb_frontend *fe)
1599 {
1600 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1601 struct av7110 *av7110 = fe->dvb->priv;
1602 u32 div;
1603 u8 data[4];
1604 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
1605
1606 div = p->frequency / 125;
1607 data[0] = (div >> 8) & 0x7f;
1608 data[1] = div & 0xff;
1609 data[2] = 0x8e;
1610 data[3] = 0x00;
1611
1612 if (fe->ops.i2c_gate_ctrl)
1613 fe->ops.i2c_gate_ctrl(fe, 1);
1614 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
1615 return -EIO;
1616 return 0;
1617 }
1618
1619 static struct tda8083_config grundig_29504_451_config = {
1620 .demod_address = 0x68,
1621 };
1622
philips_cd1516_tuner_set_params(struct dvb_frontend * fe)1623 static int philips_cd1516_tuner_set_params(struct dvb_frontend *fe)
1624 {
1625 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1626 struct av7110 *av7110 = fe->dvb->priv;
1627 u32 div;
1628 u32 f = p->frequency;
1629 u8 data[4];
1630 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
1631
1632 div = (f + 36125000 + 31250) / 62500;
1633
1634 data[0] = (div >> 8) & 0x7f;
1635 data[1] = div & 0xff;
1636 data[2] = 0x8e;
1637 data[3] = (f < 174000000 ? 0xa1 : f < 470000000 ? 0x92 : 0x34);
1638
1639 if (fe->ops.i2c_gate_ctrl)
1640 fe->ops.i2c_gate_ctrl(fe, 1);
1641 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
1642 return -EIO;
1643 return 0;
1644 }
1645
1646 static struct ves1820_config philips_cd1516_config = {
1647 .demod_address = 0x09,
1648 .xin = 57840000UL,
1649 .invert = 1,
1650 .selagc = VES1820_SELAGC_SIGNAMPERR,
1651 };
1652
alps_tdlb7_tuner_set_params(struct dvb_frontend * fe)1653 static int alps_tdlb7_tuner_set_params(struct dvb_frontend *fe)
1654 {
1655 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1656 struct av7110 *av7110 = fe->dvb->priv;
1657 u32 div, pwr;
1658 u8 data[4];
1659 struct i2c_msg msg = { .addr = 0x60, .flags = 0, .buf = data, .len = sizeof(data) };
1660
1661 div = (p->frequency + 36200000) / 166666;
1662
1663 if (p->frequency <= 782000000)
1664 pwr = 1;
1665 else
1666 pwr = 2;
1667
1668 data[0] = (div >> 8) & 0x7f;
1669 data[1] = div & 0xff;
1670 data[2] = 0x85;
1671 data[3] = pwr << 6;
1672
1673 if (fe->ops.i2c_gate_ctrl)
1674 fe->ops.i2c_gate_ctrl(fe, 1);
1675 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
1676 return -EIO;
1677 return 0;
1678 }
1679
alps_tdlb7_request_firmware(struct dvb_frontend * fe,const struct firmware ** fw,char * name)1680 static int alps_tdlb7_request_firmware(struct dvb_frontend *fe, const struct firmware **fw, char *name)
1681 {
1682 #if IS_ENABLED(CONFIG_DVB_SP8870)
1683 struct av7110 *av7110 = fe->dvb->priv;
1684
1685 return request_firmware(fw, name, &av7110->dev->pci->dev);
1686 #else
1687 return -EINVAL;
1688 #endif
1689 }
1690
1691 static const struct sp8870_config alps_tdlb7_config = {
1692 .demod_address = 0x71,
1693 .request_firmware = alps_tdlb7_request_firmware,
1694 };
1695
1696 static u8 nexusca_stv0297_inittab[] = {
1697 0x80, 0x01,
1698 0x80, 0x00,
1699 0x81, 0x01,
1700 0x81, 0x00,
1701 0x00, 0x09,
1702 0x01, 0x69,
1703 0x03, 0x00,
1704 0x04, 0x00,
1705 0x07, 0x00,
1706 0x08, 0x00,
1707 0x20, 0x00,
1708 0x21, 0x40,
1709 0x22, 0x00,
1710 0x23, 0x00,
1711 0x24, 0x40,
1712 0x25, 0x88,
1713 0x30, 0xff,
1714 0x31, 0x00,
1715 0x32, 0xff,
1716 0x33, 0x00,
1717 0x34, 0x50,
1718 0x35, 0x7f,
1719 0x36, 0x00,
1720 0x37, 0x20,
1721 0x38, 0x00,
1722 0x40, 0x1c,
1723 0x41, 0xff,
1724 0x42, 0x29,
1725 0x43, 0x00,
1726 0x44, 0xff,
1727 0x45, 0x00,
1728 0x46, 0x00,
1729 0x49, 0x04,
1730 0x4a, 0x00,
1731 0x4b, 0x7b,
1732 0x52, 0x30,
1733 0x55, 0xae,
1734 0x56, 0x47,
1735 0x57, 0xe1,
1736 0x58, 0x3a,
1737 0x5a, 0x1e,
1738 0x5b, 0x34,
1739 0x60, 0x00,
1740 0x63, 0x00,
1741 0x64, 0x00,
1742 0x65, 0x00,
1743 0x66, 0x00,
1744 0x67, 0x00,
1745 0x68, 0x00,
1746 0x69, 0x00,
1747 0x6a, 0x02,
1748 0x6b, 0x00,
1749 0x70, 0xff,
1750 0x71, 0x00,
1751 0x72, 0x00,
1752 0x73, 0x00,
1753 0x74, 0x0c,
1754 0x80, 0x00,
1755 0x81, 0x00,
1756 0x82, 0x00,
1757 0x83, 0x00,
1758 0x84, 0x04,
1759 0x85, 0x80,
1760 0x86, 0x24,
1761 0x87, 0x78,
1762 0x88, 0x10,
1763 0x89, 0x00,
1764 0x90, 0x01,
1765 0x91, 0x01,
1766 0xa0, 0x04,
1767 0xa1, 0x00,
1768 0xa2, 0x00,
1769 0xb0, 0x91,
1770 0xb1, 0x0b,
1771 0xc0, 0x53,
1772 0xc1, 0x70,
1773 0xc2, 0x12,
1774 0xd0, 0x00,
1775 0xd1, 0x00,
1776 0xd2, 0x00,
1777 0xd3, 0x00,
1778 0xd4, 0x00,
1779 0xd5, 0x00,
1780 0xde, 0x00,
1781 0xdf, 0x00,
1782 0x61, 0x49,
1783 0x62, 0x0b,
1784 0x53, 0x08,
1785 0x59, 0x08,
1786 0xff, 0xff,
1787 };
1788
nexusca_stv0297_tuner_set_params(struct dvb_frontend * fe)1789 static int nexusca_stv0297_tuner_set_params(struct dvb_frontend *fe)
1790 {
1791 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1792 struct av7110 *av7110 = fe->dvb->priv;
1793 u32 div;
1794 u8 data[4];
1795 struct i2c_msg msg = { .addr = 0x63, .flags = 0, .buf = data, .len = sizeof(data) };
1796 struct i2c_msg readmsg = { .addr = 0x63, .flags = I2C_M_RD, .buf = data, .len = 1 };
1797 int i;
1798
1799 div = (p->frequency + 36150000 + 31250) / 62500;
1800
1801 data[0] = (div >> 8) & 0x7f;
1802 data[1] = div & 0xff;
1803 data[2] = 0xce;
1804
1805 if (p->frequency < 45000000)
1806 return -EINVAL;
1807 else if (p->frequency < 137000000)
1808 data[3] = 0x01;
1809 else if (p->frequency < 403000000)
1810 data[3] = 0x02;
1811 else if (p->frequency < 860000000)
1812 data[3] = 0x04;
1813 else
1814 return -EINVAL;
1815
1816 if (fe->ops.i2c_gate_ctrl)
1817 fe->ops.i2c_gate_ctrl(fe, 1);
1818 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1) {
1819 pr_err("nexusca: pll transfer failed!\n");
1820 return -EIO;
1821 }
1822
1823 // wait for PLL lock
1824 for (i = 0; i < 20; i++) {
1825 if (fe->ops.i2c_gate_ctrl)
1826 fe->ops.i2c_gate_ctrl(fe, 1);
1827 if (i2c_transfer(&av7110->i2c_adap, &readmsg, 1) == 1)
1828 if (data[0] & 0x40)
1829 break;
1830 msleep(10);
1831 }
1832
1833 return 0;
1834 }
1835
1836 static struct stv0297_config nexusca_stv0297_config = {
1837 .demod_address = 0x1C,
1838 .inittab = nexusca_stv0297_inittab,
1839 .invert = 1,
1840 .stop_during_read = 1,
1841 };
1842
grundig_29504_401_tuner_set_params(struct dvb_frontend * fe)1843 static int grundig_29504_401_tuner_set_params(struct dvb_frontend *fe)
1844 {
1845 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1846 struct av7110 *av7110 = fe->dvb->priv;
1847 u32 div;
1848 u8 cfg, cpump, band_select;
1849 u8 data[4];
1850 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
1851
1852 div = (36125000 + p->frequency) / 166666;
1853
1854 cfg = 0x88;
1855
1856 if (p->frequency < 175000000)
1857 cpump = 2;
1858 else if (p->frequency < 390000000)
1859 cpump = 1;
1860 else if (p->frequency < 470000000)
1861 cpump = 2;
1862 else if (p->frequency < 750000000)
1863 cpump = 1;
1864 else
1865 cpump = 3;
1866
1867 if (p->frequency < 175000000)
1868 band_select = 0x0e;
1869 else if (p->frequency < 470000000)
1870 band_select = 0x05;
1871 else
1872 band_select = 0x03;
1873
1874 data[0] = (div >> 8) & 0x7f;
1875 data[1] = div & 0xff;
1876 data[2] = ((div >> 10) & 0x60) | cfg;
1877 data[3] = (cpump << 6) | band_select;
1878
1879 if (fe->ops.i2c_gate_ctrl)
1880 fe->ops.i2c_gate_ctrl(fe, 1);
1881 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
1882 return -EIO;
1883 return 0;
1884 }
1885
1886 static struct l64781_config grundig_29504_401_config = {
1887 .demod_address = 0x55,
1888 };
1889
av7110_fe_lock_fix(struct av7110 * av7110,enum fe_status status)1890 static int av7110_fe_lock_fix(struct av7110 *av7110, enum fe_status status)
1891 {
1892 int ret = 0;
1893 int synced = (status & FE_HAS_LOCK) ? 1 : 0;
1894
1895 av7110->fe_status = status;
1896
1897 if (av7110->fe_synced == synced)
1898 return 0;
1899
1900 if (av7110->playing) {
1901 av7110->fe_synced = synced;
1902 return 0;
1903 }
1904
1905 if (mutex_lock_interruptible(&av7110->pid_mutex))
1906 return -ERESTARTSYS;
1907
1908 if (synced) {
1909 ret = SetPIDs(av7110, av7110->pids[DMX_PES_VIDEO],
1910 av7110->pids[DMX_PES_AUDIO],
1911 av7110->pids[DMX_PES_TELETEXT], 0,
1912 av7110->pids[DMX_PES_PCR]);
1913 if (!ret)
1914 ret = av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, Scan, 0);
1915 } else {
1916 ret = SetPIDs(av7110, 0, 0, 0, 0, 0);
1917 if (!ret) {
1918 ret = av7110_fw_cmd(av7110, COMTYPE_PID_FILTER, FlushTSQueue, 0);
1919 if (!ret)
1920 ret = av7110_wait_msgstate(av7110, GPMQBusy);
1921 }
1922 }
1923
1924 if (!ret)
1925 av7110->fe_synced = synced;
1926
1927 mutex_unlock(&av7110->pid_mutex);
1928 return ret;
1929 }
1930
av7110_fe_set_frontend(struct dvb_frontend * fe)1931 static int av7110_fe_set_frontend(struct dvb_frontend *fe)
1932 {
1933 struct av7110 *av7110 = fe->dvb->priv;
1934
1935 int ret = av7110_fe_lock_fix(av7110, 0);
1936
1937 if (!ret)
1938 ret = av7110->fe_set_frontend(fe);
1939
1940 return ret;
1941 }
1942
av7110_fe_init(struct dvb_frontend * fe)1943 static int av7110_fe_init(struct dvb_frontend *fe)
1944 {
1945 struct av7110 *av7110 = fe->dvb->priv;
1946
1947 int ret = av7110_fe_lock_fix(av7110, 0);
1948
1949 if (!ret)
1950 ret = av7110->fe_init(fe);
1951 return ret;
1952 }
1953
av7110_fe_read_status(struct dvb_frontend * fe,enum fe_status * status)1954 static int av7110_fe_read_status(struct dvb_frontend *fe,
1955 enum fe_status *status)
1956 {
1957 struct av7110 *av7110 = fe->dvb->priv;
1958
1959 /* call the real implementation */
1960 int ret = av7110->fe_read_status(fe, status);
1961
1962 if (!ret)
1963 if (((*status ^ av7110->fe_status) & FE_HAS_LOCK) && (*status & FE_HAS_LOCK))
1964 ret = av7110_fe_lock_fix(av7110, *status);
1965 return ret;
1966 }
1967
av7110_fe_diseqc_reset_overload(struct dvb_frontend * fe)1968 static int av7110_fe_diseqc_reset_overload(struct dvb_frontend *fe)
1969 {
1970 struct av7110 *av7110 = fe->dvb->priv;
1971
1972 int ret = av7110_fe_lock_fix(av7110, 0);
1973
1974 if (!ret)
1975 ret = av7110->fe_diseqc_reset_overload(fe);
1976 return ret;
1977 }
1978
av7110_fe_diseqc_send_master_cmd(struct dvb_frontend * fe,struct dvb_diseqc_master_cmd * cmd)1979 static int av7110_fe_diseqc_send_master_cmd(struct dvb_frontend *fe,
1980 struct dvb_diseqc_master_cmd *cmd)
1981 {
1982 struct av7110 *av7110 = fe->dvb->priv;
1983
1984 int ret = av7110_fe_lock_fix(av7110, 0);
1985
1986 if (!ret) {
1987 av7110->saved_master_cmd = *cmd;
1988 ret = av7110->fe_diseqc_send_master_cmd(fe, cmd);
1989 }
1990 return ret;
1991 }
1992
av7110_fe_diseqc_send_burst(struct dvb_frontend * fe,enum fe_sec_mini_cmd minicmd)1993 static int av7110_fe_diseqc_send_burst(struct dvb_frontend *fe,
1994 enum fe_sec_mini_cmd minicmd)
1995 {
1996 struct av7110 *av7110 = fe->dvb->priv;
1997
1998 int ret = av7110_fe_lock_fix(av7110, 0);
1999
2000 if (!ret) {
2001 av7110->saved_minicmd = minicmd;
2002 ret = av7110->fe_diseqc_send_burst(fe, minicmd);
2003 }
2004 return ret;
2005 }
2006
av7110_fe_set_tone(struct dvb_frontend * fe,enum fe_sec_tone_mode tone)2007 static int av7110_fe_set_tone(struct dvb_frontend *fe,
2008 enum fe_sec_tone_mode tone)
2009 {
2010 struct av7110 *av7110 = fe->dvb->priv;
2011
2012 int ret = av7110_fe_lock_fix(av7110, 0);
2013
2014 if (!ret) {
2015 av7110->saved_tone = tone;
2016 ret = av7110->fe_set_tone(fe, tone);
2017 }
2018 return ret;
2019 }
2020
av7110_fe_set_voltage(struct dvb_frontend * fe,enum fe_sec_voltage voltage)2021 static int av7110_fe_set_voltage(struct dvb_frontend *fe,
2022 enum fe_sec_voltage voltage)
2023 {
2024 struct av7110 *av7110 = fe->dvb->priv;
2025
2026 int ret = av7110_fe_lock_fix(av7110, 0);
2027
2028 if (!ret) {
2029 av7110->saved_voltage = voltage;
2030 ret = av7110->fe_set_voltage(fe, voltage);
2031 }
2032 return ret;
2033 }
2034
av7110_fe_dishnetwork_send_legacy_command(struct dvb_frontend * fe,unsigned long cmd)2035 static int av7110_fe_dishnetwork_send_legacy_command(struct dvb_frontend *fe, unsigned long cmd)
2036 {
2037 struct av7110 *av7110 = fe->dvb->priv;
2038
2039 int ret = av7110_fe_lock_fix(av7110, 0);
2040
2041 if (!ret)
2042 ret = av7110->fe_dishnetwork_send_legacy_command(fe, cmd);
2043 return ret;
2044 }
2045
dvb_s_recover(struct av7110 * av7110)2046 static void dvb_s_recover(struct av7110 *av7110)
2047 {
2048 av7110_fe_init(av7110->fe);
2049
2050 av7110_fe_set_voltage(av7110->fe, av7110->saved_voltage);
2051 if (av7110->saved_master_cmd.msg_len) {
2052 msleep(20);
2053 av7110_fe_diseqc_send_master_cmd(av7110->fe, &av7110->saved_master_cmd);
2054 }
2055 msleep(20);
2056 av7110_fe_diseqc_send_burst(av7110->fe, av7110->saved_minicmd);
2057 msleep(20);
2058 av7110_fe_set_tone(av7110->fe, av7110->saved_tone);
2059
2060 av7110_fe_set_frontend(av7110->fe);
2061 }
2062
read_pwm(struct av7110 * av7110)2063 static u8 read_pwm(struct av7110 *av7110)
2064 {
2065 u8 b = 0xff;
2066 u8 pwm;
2067 struct i2c_msg msg[] = { { .addr = 0x50, .flags = 0, .buf = &b, .len = 1 },
2068 { .addr = 0x50, .flags = I2C_M_RD, .buf = &pwm, .len = 1} };
2069
2070 if ((i2c_transfer(&av7110->i2c_adap, msg, 2) != 2) || (pwm == 0xff))
2071 pwm = 0x48;
2072
2073 return pwm;
2074 }
2075
frontend_init(struct av7110 * av7110)2076 static int frontend_init(struct av7110 *av7110)
2077 {
2078 int ret;
2079
2080 if (av7110->dev->pci->subsystem_vendor == 0x110a) {
2081 switch (av7110->dev->pci->subsystem_device) {
2082 case 0x0000: // Fujitsu/Siemens DVB-Cable (ves1820/Philips CD1516(??))
2083 av7110->fe = dvb_attach(ves1820_attach, &philips_cd1516_config,
2084 &av7110->i2c_adap, read_pwm(av7110));
2085 if (av7110->fe)
2086 av7110->fe->ops.tuner_ops.set_params = philips_cd1516_tuner_set_params;
2087 break;
2088 }
2089
2090 } else if (av7110->dev->pci->subsystem_vendor == 0x13c2) {
2091 switch (av7110->dev->pci->subsystem_device) {
2092 case 0x0000: // Hauppauge/TT WinTV DVB-S rev1.X
2093 case 0x0003: // Hauppauge/TT WinTV Nexus-S Rev 2.X
2094 case 0x1002: // Hauppauge/TT WinTV DVB-S rev1.3SE
2095
2096 // try the ALPS BSRV2 first of all
2097 av7110->fe = dvb_attach(ves1x93_attach, &alps_bsrv2_config, &av7110->i2c_adap);
2098 if (av7110->fe) {
2099 av7110->fe->ops.tuner_ops.set_params = alps_bsrv2_tuner_set_params;
2100 av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
2101 av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst;
2102 av7110->fe->ops.set_tone = av7110_set_tone;
2103 av7110->recover = dvb_s_recover;
2104 break;
2105 }
2106
2107 // try the ALPS BSRU6 now
2108 av7110->fe = dvb_attach(stv0299_attach, &alps_bsru6_config, &av7110->i2c_adap);
2109 if (av7110->fe) {
2110 av7110->fe->ops.tuner_ops.set_params = alps_bsru6_tuner_set_params;
2111 av7110->fe->tuner_priv = &av7110->i2c_adap;
2112
2113 av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
2114 av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst;
2115 av7110->fe->ops.set_tone = av7110_set_tone;
2116 av7110->recover = dvb_s_recover;
2117 break;
2118 }
2119
2120 // Try the grundig 29504-451
2121 av7110->fe = dvb_attach(tda8083_attach, &grundig_29504_451_config, &av7110->i2c_adap);
2122 if (av7110->fe) {
2123 av7110->fe->ops.tuner_ops.set_params = grundig_29504_451_tuner_set_params;
2124 av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
2125 av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst;
2126 av7110->fe->ops.set_tone = av7110_set_tone;
2127 av7110->recover = dvb_s_recover;
2128 break;
2129 }
2130
2131 /* Try DVB-C cards */
2132 switch (av7110->dev->pci->subsystem_device) {
2133 case 0x0000:
2134 /* Siemens DVB-C (full-length card) VES1820/Philips CD1516 */
2135 av7110->fe = dvb_attach(ves1820_attach, &philips_cd1516_config, &av7110->i2c_adap,
2136 read_pwm(av7110));
2137 if (av7110->fe)
2138 av7110->fe->ops.tuner_ops.set_params = philips_cd1516_tuner_set_params;
2139 break;
2140 case 0x0003:
2141 /* Hauppauge DVB-C 2.1 VES1820/ALPS TDBE2 */
2142 av7110->fe = dvb_attach(ves1820_attach, &alps_tdbe2_config, &av7110->i2c_adap,
2143 read_pwm(av7110));
2144 if (av7110->fe)
2145 av7110->fe->ops.tuner_ops.set_params = alps_tdbe2_tuner_set_params;
2146 break;
2147 }
2148 break;
2149
2150 case 0x0001: // Hauppauge/TT Nexus-T premium rev1.X
2151 {
2152 struct dvb_frontend *fe;
2153
2154 // try ALPS TDLB7 first, then Grundig 29504-401
2155 fe = dvb_attach(sp8870_attach, &alps_tdlb7_config, &av7110->i2c_adap);
2156 if (fe) {
2157 fe->ops.tuner_ops.set_params = alps_tdlb7_tuner_set_params;
2158 av7110->fe = fe;
2159 break;
2160 }
2161 }
2162 fallthrough;
2163
2164 case 0x0008: // Hauppauge/TT DVB-T
2165 // Grundig 29504-401
2166 av7110->fe = dvb_attach(l64781_attach, &grundig_29504_401_config, &av7110->i2c_adap);
2167 if (av7110->fe)
2168 av7110->fe->ops.tuner_ops.set_params = grundig_29504_401_tuner_set_params;
2169 break;
2170
2171 case 0x0002: // Hauppauge/TT DVB-C premium rev2.X
2172
2173 av7110->fe = dvb_attach(ves1820_attach, &alps_tdbe2_config, &av7110->i2c_adap, read_pwm(av7110));
2174 if (av7110->fe)
2175 av7110->fe->ops.tuner_ops.set_params = alps_tdbe2_tuner_set_params;
2176 break;
2177
2178 case 0x0004: // Galaxis DVB-S rev1.3
2179 /* ALPS BSRV2 */
2180 av7110->fe = dvb_attach(ves1x93_attach, &alps_bsrv2_config, &av7110->i2c_adap);
2181 if (av7110->fe) {
2182 av7110->fe->ops.tuner_ops.set_params = alps_bsrv2_tuner_set_params;
2183 av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
2184 av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst;
2185 av7110->fe->ops.set_tone = av7110_set_tone;
2186 av7110->recover = dvb_s_recover;
2187 }
2188 break;
2189
2190 case 0x0006: /* Fujitsu-Siemens DVB-S rev 1.6 */
2191 /* Grundig 29504-451 */
2192 av7110->fe = dvb_attach(tda8083_attach, &grundig_29504_451_config, &av7110->i2c_adap);
2193 if (av7110->fe) {
2194 av7110->fe->ops.tuner_ops.set_params = grundig_29504_451_tuner_set_params;
2195 av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
2196 av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst;
2197 av7110->fe->ops.set_tone = av7110_set_tone;
2198 av7110->recover = dvb_s_recover;
2199 }
2200 break;
2201
2202 case 0x000A: // Hauppauge/TT Nexus-CA rev1.X
2203
2204 av7110->fe = dvb_attach(stv0297_attach, &nexusca_stv0297_config, &av7110->i2c_adap);
2205 if (av7110->fe) {
2206 av7110->fe->ops.tuner_ops.set_params = nexusca_stv0297_tuner_set_params;
2207
2208 /* set TDA9819 into DVB mode */
2209 saa7146_setgpio(av7110->dev, 1, SAA7146_GPIO_OUTLO); // TDA9819 pin9(STD)
2210 saa7146_setgpio(av7110->dev, 3, SAA7146_GPIO_OUTLO); // TDA9819 pin30(VIF)
2211
2212 /* tuner on this needs a slower i2c bus speed */
2213 av7110->dev->i2c_bitrate = SAA7146_I2C_BUS_BIT_RATE_240;
2214 break;
2215 }
2216 break;
2217
2218 case 0x000E: /* Hauppauge/TT Nexus-S rev 2.3 */
2219 /* ALPS BSBE1 */
2220 av7110->fe = dvb_attach(stv0299_attach, &alps_bsbe1_config, &av7110->i2c_adap);
2221 if (av7110->fe) {
2222 av7110->fe->ops.tuner_ops.set_params = alps_bsbe1_tuner_set_params;
2223 av7110->fe->tuner_priv = &av7110->i2c_adap;
2224
2225 if (!dvb_attach(lnbp21_attach, av7110->fe, &av7110->i2c_adap, 0, 0)) {
2226 pr_err("LNBP21 not found!\n");
2227 if (av7110->fe->ops.release)
2228 av7110->fe->ops.release(av7110->fe);
2229 av7110->fe = NULL;
2230 } else {
2231 av7110->fe->ops.dishnetwork_send_legacy_command = NULL;
2232 av7110->recover = dvb_s_recover;
2233 }
2234 }
2235 break;
2236 }
2237 }
2238
2239 if (!av7110->fe) {
2240 /* FIXME: propagate the failure code from the lower layers */
2241 ret = -ENOMEM;
2242 pr_err("A frontend driver was not found for device [%04x:%04x] subsystem [%04x:%04x]\n",
2243 av7110->dev->pci->vendor, av7110->dev->pci->device,
2244 av7110->dev->pci->subsystem_vendor, av7110->dev->pci->subsystem_device);
2245 } else {
2246 FE_FUNC_OVERRIDE(av7110->fe->ops.init, av7110->fe_init, av7110_fe_init);
2247 FE_FUNC_OVERRIDE(av7110->fe->ops.read_status, av7110->fe_read_status, av7110_fe_read_status);
2248 FE_FUNC_OVERRIDE(av7110->fe->ops.diseqc_reset_overload, av7110->fe_diseqc_reset_overload, av7110_fe_diseqc_reset_overload);
2249 FE_FUNC_OVERRIDE(av7110->fe->ops.diseqc_send_master_cmd, av7110->fe_diseqc_send_master_cmd, av7110_fe_diseqc_send_master_cmd);
2250 FE_FUNC_OVERRIDE(av7110->fe->ops.diseqc_send_burst, av7110->fe_diseqc_send_burst, av7110_fe_diseqc_send_burst);
2251 FE_FUNC_OVERRIDE(av7110->fe->ops.set_tone, av7110->fe_set_tone, av7110_fe_set_tone);
2252 FE_FUNC_OVERRIDE(av7110->fe->ops.set_voltage, av7110->fe_set_voltage, av7110_fe_set_voltage);
2253 FE_FUNC_OVERRIDE(av7110->fe->ops.dishnetwork_send_legacy_command, av7110->fe_dishnetwork_send_legacy_command, av7110_fe_dishnetwork_send_legacy_command);
2254 FE_FUNC_OVERRIDE(av7110->fe->ops.set_frontend, av7110->fe_set_frontend, av7110_fe_set_frontend);
2255
2256 ret = dvb_register_frontend(&av7110->dvb_adapter, av7110->fe);
2257 if (ret < 0) {
2258 pr_err("av7110: Frontend registration failed!\n");
2259 dvb_frontend_detach(av7110->fe);
2260 av7110->fe = NULL;
2261 }
2262 }
2263 return ret;
2264 }
2265
2266 /* Budgetpatch note:
2267 * Original hardware design by Roberto Deza:
2268 * There is a DVB_Wiki at
2269 * https://linuxtv.org
2270 *
2271 * New software triggering design by Emard that works on
2272 * original Roberto Deza's hardware:
2273 *
2274 * rps1 code for budgetpatch will copy internal HS event to GPIO3 pin.
2275 * GPIO3 is in budget-patch hardware connectd to port B VSYNC
2276 * HS is an internal event of 7146, accessible with RPS
2277 * and temporarily raised high every n lines
2278 * (n in defined in the RPS_THRESH1 counter threshold)
2279 * I think HS is raised high on the beginning of the n-th line
2280 * and remains high until this n-th line that triggered
2281 * it is completely received. When the reception of n-th line
2282 * ends, HS is lowered.
2283 *
2284 * To transmit data over DMA, 7146 needs changing state at
2285 * port B VSYNC pin. Any changing of port B VSYNC will
2286 * cause some DMA data transfer, with more or less packets loss.
2287 * It depends on the phase and frequency of VSYNC and
2288 * the way of 7146 is instructed to trigger on port B (defined
2289 * in DD1_INIT register, 3rd nibble from the right valid
2290 * numbers are 0-7, see datasheet)
2291 *
2292 * The correct triggering can minimize packet loss,
2293 * dvbtraffic should give this stable bandwidths:
2294 * 22k transponder = 33814 kbit/s
2295 * 27.5k transponder = 38045 kbit/s
2296 * by experiment it is found that the best results
2297 * (stable bandwidths and almost no packet loss)
2298 * are obtained using DD1_INIT triggering number 2
2299 * (Va at rising edge of VS Fa = HS x VS-failing forced toggle)
2300 * and a VSYNC phase that occurs in the middle of DMA transfer
2301 * (about byte 188*512=96256 in the DMA window).
2302 *
2303 * Phase of HS is still not clear to me how to control,
2304 * It just happens to be so. It can be seen if one enables
2305 * RPS_IRQ and print Event Counter 1 in vpeirq(). Every
2306 * time RPS_INTERRUPT is called, the Event Counter 1 will
2307 * increment. That's how the 7146 is programmed to do event
2308 * counting in this budget-patch.c
2309 * I *think* HPS setting has something to do with the phase
2310 * of HS but I can't be 100% sure in that.
2311 *
2312 * hardware debug note: a working budget card (including budget patch)
2313 * with vpeirq() interrupt setup in mode "0x90" (every 64K) will
2314 * generate 3 interrupts per 25-Hz DMA frame of 2*188*512 bytes
2315 * and that means 3*25=75 Hz of interrupt frequency, as seen by
2316 * watch cat /proc/interrupts
2317 *
2318 * If this frequency is 3x lower (and data received in the DMA
2319 * buffer don't start with 0x47, but in the middle of packets,
2320 * whose lengths appear to be like 188 292 188 104 etc.
2321 * this means VSYNC line is not connected in the hardware.
2322 * (check soldering pcb and pins)
2323 * The same behaviour of missing VSYNC can be duplicated on budget
2324 * cards, by setting DD1_INIT trigger mode 7 in 3rd nibble.
2325 */
av7110_attach(struct saa7146_dev * dev,struct saa7146_pci_extension_data * pci_ext)2326 static int av7110_attach(struct saa7146_dev *dev,
2327 struct saa7146_pci_extension_data *pci_ext)
2328 {
2329 const int length = TS_WIDTH * TS_HEIGHT;
2330 struct pci_dev *pdev = dev->pci;
2331 struct av7110 *av7110;
2332 struct task_struct *thread;
2333 int ret, count = 0;
2334
2335 dprintk(4, "dev: %p\n", dev);
2336
2337 /* Set RPS_IRQ to 1 to track rps1 activity.
2338 * Enabling this won't send any interrupt to PC CPU.
2339 */
2340 #define RPS_IRQ 0
2341
2342 if (budgetpatch == 1) {
2343 budgetpatch = 0;
2344 /* autodetect the presence of budget patch
2345 * this only works if saa7146 has been recently
2346 * reset with MASK_31 to MC1
2347 *
2348 * will wait for VBI_B event (vertical blank at port B)
2349 * and will reset GPIO3 after VBI_B is detected.
2350 * (GPIO3 should be raised high by CPU to
2351 * test if GPIO3 will generate vertical blank signal
2352 * in budget patch GPIO3 is connected to VSYNC_B
2353 */
2354
2355 /* RESET SAA7146 */
2356 saa7146_write(dev, MC1, MASK_31);
2357 /* autodetection success seems to be time-dependend after reset */
2358
2359 /* Fix VSYNC level */
2360 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
2361 /* set vsync_b triggering */
2362 saa7146_write(dev, DD1_STREAM_B, 0);
2363 /* port B VSYNC at rising edge */
2364 saa7146_write(dev, DD1_INIT, 0x00000200);
2365 saa7146_write(dev, BRS_CTRL, 0x00000000); // VBI
2366 saa7146_write(dev, MC2,
2367 1 * (MASK_08 | MASK_24) | // BRS control
2368 0 * (MASK_09 | MASK_25) | // a
2369 1 * (MASK_10 | MASK_26) | // b
2370 0 * (MASK_06 | MASK_22) | // HPS_CTRL1
2371 0 * (MASK_05 | MASK_21) | // HPS_CTRL2
2372 0 * (MASK_01 | MASK_15) // DEBI
2373 );
2374
2375 /* start writing RPS1 code from beginning */
2376 count = 0;
2377 /* Disable RPS1 */
2378 saa7146_write(dev, MC1, MASK_29);
2379 /* RPS1 timeout disable */
2380 saa7146_write(dev, RPS_TOV1, 0);
2381 WRITE_RPS1(CMD_PAUSE | EVT_VBI_B);
2382 WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL >> 2));
2383 WRITE_RPS1(GPIO3_MSK);
2384 WRITE_RPS1(SAA7146_GPIO_OUTLO << 24);
2385 #if RPS_IRQ
2386 /* issue RPS1 interrupt to increment counter */
2387 WRITE_RPS1(CMD_INTERRUPT);
2388 #endif
2389 WRITE_RPS1(CMD_STOP);
2390 /* Jump to begin of RPS program as safety measure (p37) */
2391 WRITE_RPS1(CMD_JUMP);
2392 WRITE_RPS1(dev->d_rps1.dma_handle);
2393
2394 #if RPS_IRQ
2395 /* set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53)
2396 * use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled
2397 * use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called
2398 */
2399 saa7146_write(dev, EC1SSR, (0x03 << 2) | 3);
2400 /* set event counter 1 threshold to maximum allowed value (rEC p55) */
2401 saa7146_write(dev, ECT1R, 0x3fff);
2402 #endif
2403 /* Set RPS1 Address register to point to RPS code (r108 p42) */
2404 saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
2405 /* Enable RPS1, (rFC p33) */
2406 saa7146_write(dev, MC1, (MASK_13 | MASK_29));
2407
2408 mdelay(10);
2409 /* now send VSYNC_B to rps1 by rising GPIO3 */
2410 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI);
2411 mdelay(10);
2412 /* if rps1 responded by lowering the GPIO3,
2413 * then we have budgetpatch hardware
2414 */
2415 if ((saa7146_read(dev, GPIO_CTRL) & 0x10000000) == 0) {
2416 budgetpatch = 1;
2417 pr_info("BUDGET-PATCH DETECTED.\n");
2418 }
2419 /* Disable RPS1 */
2420 saa7146_write(dev, MC1, (MASK_29));
2421 #if RPS_IRQ
2422 pr_info("Event Counter 1 0x%04x\n", saa7146_read(dev, EC1R) & 0x3fff);
2423 #endif
2424 }
2425
2426 /* prepare the av7110 device struct */
2427 av7110 = kzalloc(sizeof(*av7110), GFP_KERNEL);
2428 if (!av7110) {
2429 dprintk(1, "out of memory\n");
2430 return -ENOMEM;
2431 }
2432
2433 av7110->card_name = (char *)pci_ext->ext_priv;
2434 av7110->dev = dev;
2435 dev->ext_priv = av7110;
2436
2437 ret = get_firmware(av7110);
2438 if (ret < 0)
2439 goto err_kfree_0;
2440
2441 ret = dvb_register_adapter(&av7110->dvb_adapter, av7110->card_name,
2442 THIS_MODULE, &dev->pci->dev, adapter_nr);
2443 if (ret < 0)
2444 goto err_put_firmware_1;
2445
2446 /* the Siemens DVB needs this if you want to have the i2c chips
2447 * get recognized before the main driver is fully loaded
2448 */
2449 saa7146_write(dev, GPIO_CTRL, 0x500000);
2450
2451 strscpy(av7110->i2c_adap.name, pci_ext->ext_priv,
2452 sizeof(av7110->i2c_adap.name));
2453
2454 saa7146_i2c_adapter_prepare(dev, &av7110->i2c_adap, SAA7146_I2C_BUS_BIT_RATE_120); /* 275 kHz */
2455
2456 ret = i2c_add_adapter(&av7110->i2c_adap);
2457 if (ret < 0)
2458 goto err_dvb_unregister_adapter_2;
2459
2460 ttpci_eeprom_parse_mac(&av7110->i2c_adap,
2461 av7110->dvb_adapter.proposed_mac);
2462 ret = -ENOMEM;
2463
2464 /* full-ts mod? */
2465 if (full_ts)
2466 av7110->full_ts = true;
2467
2468 /* check for full-ts flag in eeprom */
2469 if (i2c_readreg(av7110, 0xaa, 0) == 0x4f && i2c_readreg(av7110, 0xaa, 1) == 0x45) {
2470 u8 flags = i2c_readreg(av7110, 0xaa, 2);
2471
2472 if (flags != 0xff && (flags & 0x01))
2473 av7110->full_ts = true;
2474 }
2475
2476 if (av7110->full_ts) {
2477 pr_info("full-ts mode enabled for saa7146 port B\n");
2478 spin_lock_init(&av7110->feedlock1);
2479 av7110->grabbing = saa7146_vmalloc_build_pgtable(pdev, length,
2480 &av7110->pt);
2481 if (!av7110->grabbing)
2482 goto err_i2c_del_3;
2483
2484 saa7146_write(dev, DD1_STREAM_B, 0x00000000);
2485 saa7146_write(dev, MC2, (MASK_10 | MASK_26));
2486
2487 saa7146_write(dev, DD1_INIT, 0x00000600);
2488 saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
2489
2490 saa7146_write(dev, BRS_CTRL, 0x60000000);
2491 saa7146_write(dev, MC2, MASK_08 | MASK_24);
2492
2493 /* dma3 */
2494 saa7146_write(dev, PCI_BT_V1, 0x001c0000 | (saa7146_read(dev, PCI_BT_V1) & ~0x001f0000));
2495 saa7146_write(dev, BASE_ODD3, 0);
2496 saa7146_write(dev, BASE_EVEN3, 0);
2497 saa7146_write(dev, PROT_ADDR3, TS_WIDTH * TS_HEIGHT);
2498 saa7146_write(dev, PITCH3, TS_WIDTH);
2499 saa7146_write(dev, BASE_PAGE3, av7110->pt.dma | ME1 | 0x90);
2500 saa7146_write(dev, NUM_LINE_BYTE3, (TS_HEIGHT << 16) | TS_WIDTH);
2501 saa7146_write(dev, MC2, MASK_04 | MASK_20);
2502
2503 tasklet_setup(&av7110->vpe_tasklet, vpeirq);
2504
2505 } else if (budgetpatch) {
2506 spin_lock_init(&av7110->feedlock1);
2507 av7110->grabbing = saa7146_vmalloc_build_pgtable(pdev, length,
2508 &av7110->pt);
2509 if (!av7110->grabbing)
2510 goto err_i2c_del_3;
2511
2512 saa7146_write(dev, PCI_BT_V1, 0x1c1f101f);
2513 saa7146_write(dev, BCS_CTRL, 0x80400040);
2514 /* set dd1 stream a & b */
2515 saa7146_write(dev, DD1_STREAM_B, 0x00000000);
2516 saa7146_write(dev, DD1_INIT, 0x03000200);
2517 saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
2518 saa7146_write(dev, BRS_CTRL, 0x60000000);
2519 saa7146_write(dev, BASE_ODD3, 0);
2520 saa7146_write(dev, BASE_EVEN3, 0);
2521 saa7146_write(dev, PROT_ADDR3, TS_WIDTH * TS_HEIGHT);
2522 saa7146_write(dev, BASE_PAGE3, av7110->pt.dma | ME1 | 0x90);
2523
2524 saa7146_write(dev, PITCH3, TS_WIDTH);
2525 saa7146_write(dev, NUM_LINE_BYTE3, (TS_HEIGHT << 16) | TS_WIDTH);
2526
2527 /* upload all */
2528 saa7146_write(dev, MC2, 0x077c077c);
2529 saa7146_write(dev, GPIO_CTRL, 0x000000);
2530 #if RPS_IRQ
2531 /* set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53)
2532 * use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled
2533 * use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called
2534 */
2535 saa7146_write(dev, EC1SSR, (0x03 << 2) | 3);
2536 /* set event counter 1 threshold to maximum allowed value (rEC p55) */
2537 saa7146_write(dev, ECT1R, 0x3fff);
2538 #endif
2539 /* Setup BUDGETPATCH MAIN RPS1 "program" (p35) */
2540 count = 0;
2541
2542 /* Wait Source Line Counter Threshold (p36) */
2543 WRITE_RPS1(CMD_PAUSE | EVT_HS);
2544 /* Set GPIO3=1 (p42) */
2545 WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL >> 2));
2546 WRITE_RPS1(GPIO3_MSK);
2547 WRITE_RPS1(SAA7146_GPIO_OUTHI << 24);
2548 #if RPS_IRQ
2549 /* issue RPS1 interrupt */
2550 WRITE_RPS1(CMD_INTERRUPT);
2551 #endif
2552 /* Wait reset Source Line Counter Threshold (p36) */
2553 WRITE_RPS1(CMD_PAUSE | RPS_INV | EVT_HS);
2554 /* Set GPIO3=0 (p42) */
2555 WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL >> 2));
2556 WRITE_RPS1(GPIO3_MSK);
2557 WRITE_RPS1(SAA7146_GPIO_OUTLO << 24);
2558 #if RPS_IRQ
2559 /* issue RPS1 interrupt */
2560 WRITE_RPS1(CMD_INTERRUPT);
2561 #endif
2562 /* Jump to begin of RPS program (p37) */
2563 WRITE_RPS1(CMD_JUMP);
2564 WRITE_RPS1(dev->d_rps1.dma_handle);
2565
2566 /* Fix VSYNC level */
2567 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
2568 /* Set RPS1 Address register to point to RPS code (r108 p42) */
2569 saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
2570 /* Set Source Line Counter Threshold, using BRS (rCC p43)
2571 * It generates HS event every TS_HEIGHT lines
2572 * this is related to TS_WIDTH set in register
2573 * NUM_LINE_BYTE3. If NUM_LINE_BYTE low 16 bits
2574 * are set to TS_WIDTH bytes (TS_WIDTH=2*188),
2575 * then RPS_THRESH1 should be set to trigger
2576 * every TS_HEIGHT (512) lines.
2577 */
2578 saa7146_write(dev, RPS_THRESH1, (TS_HEIGHT * 1) | MASK_12);
2579
2580 /* Enable RPS1 (rFC p33) */
2581 saa7146_write(dev, MC1, (MASK_13 | MASK_29));
2582
2583 /* end of budgetpatch register initialization */
2584 tasklet_setup(&av7110->vpe_tasklet, vpeirq);
2585 } else {
2586 saa7146_write(dev, PCI_BT_V1, 0x1c00101f);
2587 saa7146_write(dev, BCS_CTRL, 0x80400040);
2588
2589 /* set dd1 stream a & b */
2590 saa7146_write(dev, DD1_STREAM_B, 0x00000000);
2591 saa7146_write(dev, DD1_INIT, 0x03000000);
2592 saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
2593
2594 /* upload all */
2595 saa7146_write(dev, MC2, 0x077c077c);
2596 saa7146_write(dev, GPIO_CTRL, 0x000000);
2597 }
2598
2599 tasklet_setup(&av7110->debi_tasklet, debiirq);
2600 tasklet_setup(&av7110->gpio_tasklet, gpioirq);
2601
2602 mutex_init(&av7110->pid_mutex);
2603
2604 /* locks for data transfers from/to AV7110 */
2605 spin_lock_init(&av7110->debilock);
2606 mutex_init(&av7110->dcomlock);
2607 av7110->debitype = -1;
2608
2609 /* default OSD window */
2610 av7110->osdwin = 1;
2611 mutex_init(&av7110->osd_mutex);
2612
2613 /* TV standard */
2614 av7110->vidmode = tv_standard == 1 ? AV7110_VIDEO_MODE_NTSC
2615 : AV7110_VIDEO_MODE_PAL;
2616
2617 /* ARM "watchdog" */
2618 init_waitqueue_head(&av7110->arm_wait);
2619 av7110->arm_thread = NULL;
2620
2621 /* allocate and init buffers */
2622 av7110->debi_virt = dma_alloc_coherent(&pdev->dev, 8192,
2623 &av7110->debi_bus, GFP_KERNEL);
2624 if (!av7110->debi_virt)
2625 goto err_saa71466_vfree_4;
2626
2627 av7110->iobuf = vmalloc(AVOUTLEN + AOUTLEN + BMPLEN + 4 * IPACKS);
2628 if (!av7110->iobuf)
2629 goto err_pci_free_5;
2630
2631 ret = av7110_av_init(av7110);
2632 if (ret < 0)
2633 goto err_iobuf_vfree_6;
2634
2635 /* init BMP buffer */
2636 av7110->bmpbuf = av7110->iobuf + AVOUTLEN + AOUTLEN;
2637 init_waitqueue_head(&av7110->bmpq);
2638
2639 ret = av7110_ca_init(av7110);
2640 if (ret < 0)
2641 goto err_av7110_av_exit_7;
2642
2643 /* load firmware into AV7110 cards */
2644 ret = av7110_bootarm(av7110);
2645 if (ret < 0)
2646 goto err_av7110_ca_exit_8;
2647
2648 ret = av7110_firmversion(av7110);
2649 if (ret < 0)
2650 goto err_stop_arm_9;
2651
2652 if (FW_VERSION(av7110->arm_app) < 0x2501)
2653 pr_warn("Warning, firmware version 0x%04x is too old. System might be unstable!\n",
2654 FW_VERSION(av7110->arm_app));
2655
2656 thread = kthread_run(arm_thread, (void *)av7110, "arm_mon");
2657 if (IS_ERR(thread)) {
2658 ret = PTR_ERR(thread);
2659 goto err_stop_arm_9;
2660 }
2661 av7110->arm_thread = thread;
2662
2663 /* set initial volume in mixer struct */
2664 av7110->mixer.volume_left = volume;
2665 av7110->mixer.volume_right = volume;
2666
2667 ret = av7110_register(av7110);
2668 if (ret < 0)
2669 goto err_arm_thread_stop_10;
2670
2671 init_av7110_av(av7110);
2672
2673 /* special case DVB-C: these cards have an analog tuner
2674 * plus need some special handling, so we have separate
2675 * saa7146_ext_vv data for these...
2676 */
2677 ret = av7110_init_v4l(av7110);
2678 if (ret < 0)
2679 goto err_av7110_unregister_11;
2680
2681 av7110->dvb_adapter.priv = av7110;
2682 ret = frontend_init(av7110);
2683 if (ret < 0)
2684 goto err_av7110_exit_v4l_12;
2685
2686 mutex_init(&av7110->ioctl_mutex);
2687
2688 #if IS_ENABLED(CONFIG_DVB_AV7110_IR)
2689 av7110_ir_init(av7110);
2690 #endif
2691 pr_info("found av7110-%d.\n", av7110_num);
2692 av7110_num++;
2693 out:
2694 return ret;
2695
2696 err_av7110_exit_v4l_12:
2697 av7110_exit_v4l(av7110);
2698 err_av7110_unregister_11:
2699 dvb_unregister(av7110);
2700 err_arm_thread_stop_10:
2701 av7110_arm_sync(av7110);
2702 err_stop_arm_9:
2703 /* Nothing to do. Rejoice. */
2704 err_av7110_ca_exit_8:
2705 av7110_ca_exit(av7110);
2706 err_av7110_av_exit_7:
2707 av7110_av_exit(av7110);
2708 err_iobuf_vfree_6:
2709 vfree(av7110->iobuf);
2710 err_pci_free_5:
2711 dma_free_coherent(&pdev->dev, 8192, av7110->debi_virt,
2712 av7110->debi_bus);
2713 err_saa71466_vfree_4:
2714 if (av7110->grabbing)
2715 saa7146_vfree_destroy_pgtable(pdev, av7110->grabbing, &av7110->pt);
2716 err_i2c_del_3:
2717 i2c_del_adapter(&av7110->i2c_adap);
2718 err_dvb_unregister_adapter_2:
2719 dvb_unregister_adapter(&av7110->dvb_adapter);
2720 err_put_firmware_1:
2721 put_firmware(av7110);
2722 err_kfree_0:
2723 kfree(av7110);
2724 goto out;
2725 }
2726
av7110_detach(struct saa7146_dev * saa)2727 static int av7110_detach(struct saa7146_dev *saa)
2728 {
2729 struct av7110 *av7110 = saa->ext_priv;
2730
2731 dprintk(4, "%p\n", av7110);
2732
2733 #if IS_ENABLED(CONFIG_DVB_AV7110_IR)
2734 av7110_ir_exit(av7110);
2735 #endif
2736 if (budgetpatch || av7110->full_ts) {
2737 if (budgetpatch) {
2738 /* Disable RPS1 */
2739 saa7146_write(saa, MC1, MASK_29);
2740 /* VSYNC LOW (inactive) */
2741 saa7146_setgpio(saa, 3, SAA7146_GPIO_OUTLO);
2742 }
2743 saa7146_write(saa, MC1, MASK_20); /* DMA3 off */
2744 SAA7146_IER_DISABLE(saa, MASK_10);
2745 SAA7146_ISR_CLEAR(saa, MASK_10);
2746 msleep(50);
2747 tasklet_kill(&av7110->vpe_tasklet);
2748 saa7146_vfree_destroy_pgtable(saa->pci, av7110->grabbing, &av7110->pt);
2749 }
2750 av7110_exit_v4l(av7110);
2751
2752 av7110_arm_sync(av7110);
2753
2754 tasklet_kill(&av7110->debi_tasklet);
2755 tasklet_kill(&av7110->gpio_tasklet);
2756
2757 dvb_unregister(av7110);
2758
2759 SAA7146_IER_DISABLE(saa, MASK_19 | MASK_03);
2760 SAA7146_ISR_CLEAR(saa, MASK_19 | MASK_03);
2761
2762 av7110_ca_exit(av7110);
2763 av7110_av_exit(av7110);
2764
2765 vfree(av7110->iobuf);
2766 dma_free_coherent(&saa->pci->dev, 8192, av7110->debi_virt,
2767 av7110->debi_bus);
2768
2769 i2c_del_adapter(&av7110->i2c_adap);
2770
2771 dvb_unregister_adapter(&av7110->dvb_adapter);
2772
2773 av7110_num--;
2774
2775 put_firmware(av7110);
2776
2777 kfree(av7110);
2778
2779 saa->ext_priv = NULL;
2780
2781 return 0;
2782 }
2783
av7110_irq(struct saa7146_dev * dev,u32 * isr)2784 static void av7110_irq(struct saa7146_dev *dev, u32 *isr)
2785 {
2786 struct av7110 *av7110 = dev->ext_priv;
2787
2788 //print_time("av7110_irq");
2789
2790 /* Note: Don't try to handle the DEBI error irq (MASK_18), in
2791 * intel mode the timeout is asserted all the time...
2792 */
2793
2794 if (*isr & MASK_19) {
2795 //printk("av7110_irq: DEBI\n");
2796 /* Note 1: The DEBI irq is level triggered: We must enable it
2797 * only after we started a DMA xfer, and disable it here
2798 * immediately, or it will be signalled all the time while
2799 * DEBI is idle.
2800 * Note 2: You would think that an irq which is masked is
2801 * not signalled by the hardware. Not so for the SAA7146:
2802 * An irq is signalled as long as the corresponding bit
2803 * in the ISR is set, and disabling irqs just prevents the
2804 * hardware from setting the ISR bit. This means a) that we
2805 * must clear the ISR *after* disabling the irq (which is why
2806 * we must do it here even though saa7146_core did it already),
2807 * and b) that if we were to disable an edge triggered irq
2808 * (like the gpio irqs sadly are) temporarily we would likely
2809 * loose some. This sucks :-(
2810 */
2811 SAA7146_IER_DISABLE(av7110->dev, MASK_19);
2812 SAA7146_ISR_CLEAR(av7110->dev, MASK_19);
2813 tasklet_schedule(&av7110->debi_tasklet);
2814 }
2815
2816 if (*isr & MASK_03) {
2817 //printk("av7110_irq: GPIO\n");
2818 tasklet_schedule(&av7110->gpio_tasklet);
2819 }
2820
2821 if (*isr & MASK_10)
2822 tasklet_schedule(&av7110->vpe_tasklet);
2823 }
2824
2825 static struct saa7146_extension av7110_extension_driver;
2826
2827 #define MAKE_AV7110_INFO(x_var, x_name) \
2828 static struct saa7146_pci_extension_data x_var = { \
2829 .ext_priv = x_name, \
2830 .ext = &av7110_extension_driver }
2831
2832 MAKE_AV7110_INFO(tts_1_X_fsc, "Technotrend/Hauppauge WinTV DVB-S rev1.X or Fujitsu Siemens DVB-C");
2833 MAKE_AV7110_INFO(ttt_1_X, "Technotrend/Hauppauge WinTV DVB-T rev1.X");
2834 MAKE_AV7110_INFO(ttc_1_X, "Technotrend/Hauppauge WinTV Nexus-CA rev1.X");
2835 MAKE_AV7110_INFO(ttc_2_X, "Technotrend/Hauppauge WinTV DVB-C rev2.X");
2836 MAKE_AV7110_INFO(tts_2_X, "Technotrend/Hauppauge WinTV Nexus-S rev2.X");
2837 MAKE_AV7110_INFO(tts_2_3, "Technotrend/Hauppauge WinTV Nexus-S rev2.3");
2838 MAKE_AV7110_INFO(tts_1_3se, "Technotrend/Hauppauge WinTV DVB-S rev1.3 SE");
2839 MAKE_AV7110_INFO(ttt, "Technotrend/Hauppauge DVB-T");
2840 MAKE_AV7110_INFO(fsc, "Fujitsu Siemens DVB-C");
2841 MAKE_AV7110_INFO(fss, "Fujitsu Siemens DVB-S rev1.6");
2842 MAKE_AV7110_INFO(gxs_1_3, "Galaxis DVB-S rev1.3");
2843
2844 static const struct pci_device_id pci_tbl[] = {
2845 MAKE_EXTENSION_PCI(fsc, 0x110a, 0x0000),
2846 MAKE_EXTENSION_PCI(tts_1_X_fsc, 0x13c2, 0x0000),
2847 MAKE_EXTENSION_PCI(ttt_1_X, 0x13c2, 0x0001),
2848 MAKE_EXTENSION_PCI(ttc_2_X, 0x13c2, 0x0002),
2849 MAKE_EXTENSION_PCI(tts_2_X, 0x13c2, 0x0003),
2850 MAKE_EXTENSION_PCI(gxs_1_3, 0x13c2, 0x0004),
2851 MAKE_EXTENSION_PCI(fss, 0x13c2, 0x0006),
2852 MAKE_EXTENSION_PCI(ttt, 0x13c2, 0x0008),
2853 MAKE_EXTENSION_PCI(ttc_1_X, 0x13c2, 0x000a),
2854 MAKE_EXTENSION_PCI(tts_2_3, 0x13c2, 0x000e),
2855 MAKE_EXTENSION_PCI(tts_1_3se, 0x13c2, 0x1002),
2856
2857 // MAKE_EXTENSION_PCI(???, 0x13c2, 0x0005), UNDEFINED CARD // Technisat SkyStar1
2858 // MAKE_EXTENSION_PCI(???, 0x13c2, 0x0009), UNDEFINED CARD // TT/Hauppauge WinTV Nexus-CA v???
2859
2860 {
2861 .vendor = 0,
2862 }
2863 };
2864
2865 MODULE_DEVICE_TABLE(pci, pci_tbl);
2866
2867 static struct saa7146_extension av7110_extension_driver = {
2868 .name = "av7110",
2869 .flags = SAA7146_USE_I2C_IRQ,
2870
2871 .module = THIS_MODULE,
2872 .pci_tbl = &pci_tbl[0],
2873 .attach = av7110_attach,
2874 .detach = av7110_detach,
2875
2876 .irq_mask = MASK_19 | MASK_03 | MASK_10,
2877 .irq_func = av7110_irq,
2878 };
2879
av7110_init(void)2880 static int __init av7110_init(void)
2881 {
2882 return saa7146_register_extension(&av7110_extension_driver);
2883 }
2884
av7110_exit(void)2885 static void __exit av7110_exit(void)
2886 {
2887 saa7146_unregister_extension(&av7110_extension_driver);
2888 }
2889
2890 module_init(av7110_init);
2891 module_exit(av7110_exit);
2892
2893 MODULE_DESCRIPTION("driver for the SAA7146 based AV110 PCI DVB cards by Siemens, Technotrend, Hauppauge");
2894 MODULE_AUTHOR("Ralph Metzler, Marcus Metzler, others");
2895 MODULE_LICENSE("GPL");
2896