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Searched refs:TIM_SEQ1_TRR (Results 1 – 1 of 1) sorted by relevance

/linux-6.12.1/drivers/mtd/nand/raw/
Drenesas-nand-controller.c132 #define TIM_SEQ1_TRR(x) FIELD_PREP(GENMASK(13, 8), max((x), 1U) - 1) macro
920 TIM_SEQ1_TRR(TO_CYCLES64(sdr->tRR_min, period_ns)) | in rnandc_setup_interface()