Searched refs:TIMER1 (Results 1 – 11 of 11) sorted by relevance
| /linux-6.12.1/Documentation/devicetree/bindings/timer/ |
| D | snps,arc-timer.txt | 4 - Two identical copies TIMER0 and TIMER1 exist in ARC cores and historically
6 TIMER1 used for clocksource (mandatory for ARC700, optional for ARC HS)
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| /linux-6.12.1/drivers/staging/rtl8712/ |
| D | rtl8712_gp_regdef.h | 18 #define TIMER1 (RTL8712_GP_ + 0x04) macro
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| /linux-6.12.1/arch/arc/boot/dts/ |
| D | skeleton.dtsi | 38 /* TIMER1 for free running clocksource */
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| D | skeleton_hs.dtsi | 39 /* TIMER1 for free running clocksource: Fallback if rtc not found */
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| D | abilis_tb10x.dtsi | 34 /* TIMER1 for free running clocksource */
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| /linux-6.12.1/drivers/pinctrl/ |
| D | pinctrl-lpc18xx.c | 297 LPC_P(5,0, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
298 LPC_P(5,1, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
299 LPC_P(5,2, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
300 LPC_P(5,3, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
301 LPC_P(5,4, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
302 LPC_P(5,5, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
303 LPC_P(5,6, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
304 LPC_P(5,7, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
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| /linux-6.12.1/Documentation/devicetree/bindings/interrupt-controller/ |
| D | brcm,bcm2835-armctrl-ic.txt | 46 1: TIMER1
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| /linux-6.12.1/drivers/clocksource/ |
| D | Kconfig | 190 Enable 24-bit TIMER0 and TIMER1 counters in the NPCM7xx architecture,
191 where TIMER0 serves as clockevent and TIMER1 serves as clocksource.
299 These are legacy 32-bit TIMER0 and TIMER1 counters found on all ARC cores
301 TIMER0 serves as clockevent while TIMER1 provides clocksource.
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| /linux-6.12.1/arch/arm/boot/dts/arm/ |
| D | integratorcp.dts | 155 /* TIMER1 runs @ 1MHz */
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| /linux-6.12.1/drivers/clk/nxp/ |
| D | clk-lpc32xx.c | 267 LPC32XX_CLK_DEFINE(TIMER1, "timer1", 0x0, LPC32XX_CLK_PERIPH),
1258 LPC32XX_DEFINE_GATE(TIMER1, TIMCLK_CTRL1, 3, 0),
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| /linux-6.12.1/drivers/net/wireless/realtek/rtlwifi/rtl8192se/ |
| D | reg.h | 225 #define TIMER1 0x02E8 macro
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