Searched refs:TG3_PCIE_TLDLPL_PORT (Results 1 – 2 of 2) sorted by relevance
2069 #define TG3_PCIE_TLDLPL_PORT 0x00007c00 macro
6476 for (i = 0; i < TG3_PCIE_TLDLPL_PORT; i += sizeof(u32)) in tg3_dump_state()10010 val = tr32(TG3_PCIE_TLDLPL_PORT + TG3_PCIE_PL_LO_PHYCTL1); in tg3_reset_hw()10011 tw32(TG3_PCIE_TLDLPL_PORT + TG3_PCIE_PL_LO_PHYCTL1, in tg3_reset_hw()10025 val = tr32(TG3_PCIE_TLDLPL_PORT + in tg3_reset_hw()10027 tw32(TG3_PCIE_TLDLPL_PORT + TG3_PCIE_PL_LO_PHYCTL5, in tg3_reset_hw()10047 val = tr32(TG3_PCIE_TLDLPL_PORT + in tg3_reset_hw()10050 tw32(TG3_PCIE_TLDLPL_PORT + TG3_PCIE_DL_LO_FTSMAX, in tg3_reset_hw()