Searched refs:TEGRA30_CLK_PLL_A_OUT0 (Results 1 – 11 of 11) sorted by relevance
/linux-6.12.1/drivers/clk/tegra/ |
D | clk-tegra30.c | 555 { .con_id = "pll_a_out0", .dt_id = TEGRA30_CLK_PLL_A_OUT0 }, 806 [tegra_clk_pll_a_out0] = { .dt_id = TEGRA30_CLK_PLL_A_OUT0, .present = true }, 1205 { TEGRA30_CLK_PLL_A_OUT0, TEGRA30_CLK_CLK_MAX, 11289600, 0 }, 1206 { TEGRA30_CLK_I2S0, TEGRA30_CLK_PLL_A_OUT0, 11289600, 0 }, 1207 { TEGRA30_CLK_I2S1, TEGRA30_CLK_PLL_A_OUT0, 11289600, 0 }, 1208 { TEGRA30_CLK_I2S2, TEGRA30_CLK_PLL_A_OUT0, 11289600, 0 }, 1209 { TEGRA30_CLK_I2S3, TEGRA30_CLK_PLL_A_OUT0, 11289600, 0 }, 1210 { TEGRA30_CLK_I2S4, TEGRA30_CLK_PLL_A_OUT0, 11289600, 0 },
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/linux-6.12.1/include/dt-bindings/clock/ |
D | tegra30-car.h | 212 #define TEGRA30_CLK_PLL_A_OUT0 185 macro
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/linux-6.12.1/arch/arm/boot/dts/nvidia/ |
D | tegra30-cardhu.dtsi | 669 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, 676 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
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D | tegra30-colibri.dtsi | 1055 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, 1062 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
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D | tegra30-apalis.dtsi | 1177 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, 1184 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
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D | tegra30-apalis-v1.1.dtsi | 1194 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, 1201 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
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D | tegra30-asus-nexus7-grouper-common.dtsi | 1226 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, 1233 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
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D | tegra30-asus-transformer-common.dtsi | 1683 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, 1690 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
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D | tegra30-lg-x3.dtsi | 1716 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, 1723 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
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D | tegra30-beaver.dts | 2130 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, 2137 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
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D | tegra30-pegatron-chagall.dts | 2764 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, 2771 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
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