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Searched refs:TEGRA20_CLK_PLL_A (Results 1 – 13 of 13) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dtegra20-car.h135 #define TEGRA20_CLK_PLL_A 112 macro
/linux-6.12.1/arch/arm/boot/dts/nvidia/
Dtegra20-plutux.dts57 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
Dtegra20-tec.dts66 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
Dtegra20-medcom-wide.dts92 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
Dtegra20-trimslice.dts492 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
Dtegra20-ventana.dts719 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
Dtegra20-paz00.dts729 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
Dtegra20-harmony.dts758 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
Dtegra20-colibri.dtsi773 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
Dtegra20-seaboard.dts917 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
Dtegra20-asus-tf101.dts1202 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
Dtegra20-acer-a500-picasso.dts1434 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
/linux-6.12.1/drivers/clk/tegra/
Dclk-tegra20.c433 { .con_id = "pll_a", .dt_id = TEGRA20_CLK_PLL_A },
680 clks[TEGRA20_CLK_PLL_A] = clk; in tegra20_pll_init()
1030 { TEGRA20_CLK_PLL_A, TEGRA20_CLK_CLK_MAX, 56448000, 0 },