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Searched refs:TA_CS_BC_BASE_ADDR_HI__ADDRESS_MASK (Results 1 – 13 of 13) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h10458 #define TA_CS_BC_BASE_ADDR_HI__ADDRESS_MASK 0x000000ffL macro
Dgfx_7_2_sh_mask.h13947 #define TA_CS_BC_BASE_ADDR_HI__ADDRESS_MASK 0xff macro
Dgfx_8_1_sh_mask.h16409 #define TA_CS_BC_BASE_ADDR_HI__ADDRESS_MASK 0xff macro
Dgfx_8_0_sh_mask.h15829 #define TA_CS_BC_BASE_ADDR_HI__ADDRESS_MASK 0xff macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h20162 #define TA_CS_BC_BASE_ADDR_HI__ADDRESS_MASK … macro
Dgc_9_1_sh_mask.h21469 #define TA_CS_BC_BASE_ADDR_HI__ADDRESS_MASK … macro
Dgc_9_2_1_sh_mask.h21399 #define TA_CS_BC_BASE_ADDR_HI__ADDRESS_MASK … macro
Dgc_11_5_0_sh_mask.h23465 #define TA_CS_BC_BASE_ADDR_HI__ADDRESS_MASK … macro
Dgc_11_0_0_sh_mask.h27427 #define TA_CS_BC_BASE_ADDR_HI__ADDRESS_MASK … macro
Dgc_12_0_0_sh_mask.h33757 #define TA_CS_BC_BASE_ADDR_HI__ADDRESS_MASK … macro
Dgc_11_0_3_sh_mask.h29950 #define TA_CS_BC_BASE_ADDR_HI__ADDRESS_MASK … macro
Dgc_10_1_0_sh_mask.h28092 #define TA_CS_BC_BASE_ADDR_HI__ADDRESS_MASK … macro
Dgc_10_3_0_sh_mask.h26364 #define TA_CS_BC_BASE_ADDR_HI__ADDRESS_MASK … macro