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Searched refs:TARGET_DEV25G (Results 1 – 3 of 3) sorted by relevance

/linux-6.12.1/drivers/net/ethernet/microchip/sparx5/
Dsparx5_main.c119 { TARGET_DEV25G + 1, 0x100f8000, 1 }, /* 0x6100f8000 */
122 { TARGET_DEV25G + 3, 0x10108000, 1 }, /* 0x610108000 */
125 { TARGET_DEV25G + 4, 0x10118000, 1 }, /* 0x610118000 */
176 { TARGET_DEV25G, 0x104b8000, 1 }, /* 0x6104b8000 */
179 { TARGET_DEV25G + 2, 0x104c8000, 1 }, /* 0x6104c8000 */
182 { TARGET_DEV25G + 5, 0x104d8000, 1 }, /* 0x6104d8000 */
185 { TARGET_DEV25G + 6, 0x104e8000, 1 }, /* 0x6104e8000 */
188 { TARGET_DEV25G + 7, 0x104f8000, 1 }, /* 0x6104f8000 */
Dsparx5_port.h49 return TARGET_DEV25G; in sparx5_to_high_dev()
Dsparx5_main_regs.h30 TARGET_DEV25G = 29, enumerator
2635 #define DEV25G_MAC_ENA_CFG(t) __REG(TARGET_DEV25G,\
2651 #define DEV25G_MAC_MAXLEN_CFG(t) __REG(TARGET_DEV25G,\
2667 #define DEV25G_MAC_ADV_CHK_CFG(t) __REG(TARGET_DEV25G,\
2713 #define DEV25G_DEV_RST_CTRL(t) __REG(TARGET_DEV25G,\
2771 #define DEV25G_PCS25G_CFG(t) __REG(TARGET_DEV25G,\
2781 #define DEV25G_PCS25G_SD_CFG(t) __REG(TARGET_DEV25G,\