Searched refs:SSB_TMSLOW_CLOCK (Results 1 – 3 of 3) sorted by relevance
1001 val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject; in ssb_device_is_enabled()1003 return (val == SSB_TMSLOW_CLOCK); in ssb_device_is_enabled()1026 SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK | in ssb_device_enable()1041 SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC | in ssb_device_enable()1045 ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK | in ssb_device_enable()1087 if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_CLOCK) { in ssb_device_disable()1088 ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK); in ssb_device_disable()1101 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK | in ssb_device_disable()
260 SSB_IMSTATE_REJECT | SSB_TMSLOW_CLOCK); in brcmf_chip_sb_iscoreup()261 return SSB_TMSLOW_CLOCK == regdata; in brcmf_chip_sb_iscoreup()293 if ((val & SSB_TMSLOW_CLOCK) != 0) { in brcmf_chip_sb_coredisable()327 val = SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK | in brcmf_chip_sb_coredisable()405 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK | in brcmf_chip_sb_resetcore()423 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK); in brcmf_chip_sb_resetcore()429 SSB_TMSLOW_CLOCK); in brcmf_chip_sb_resetcore()
103 #define SSB_TMSLOW_CLOCK 0x00010000 /* Clock Enable */ macro