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Searched refs:SPI_RESOURCE_RESERVE_CU_15__SGPR__SHIFT (Results 1 – 12 of 12) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_1_sh_mask.h11072 #define SPI_RESOURCE_RESERVE_CU_15__SGPR__SHIFT 0x4 macro
Dgfx_8_0_sh_mask.h10674 #define SPI_RESOURCE_RESERVE_CU_15__SGPR__SHIFT 0x4 macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h12680 #define SPI_RESOURCE_RESERVE_CU_15__SGPR__SHIFT … macro
Dgc_9_1_sh_mask.h13980 #define SPI_RESOURCE_RESERVE_CU_15__SGPR__SHIFT … macro
Dgc_9_4_3_sh_mask.h16206 #define SPI_RESOURCE_RESERVE_CU_15__SGPR__SHIFT … macro
Dgc_9_2_1_sh_mask.h13845 #define SPI_RESOURCE_RESERVE_CU_15__SGPR__SHIFT … macro
Dgc_9_4_2_sh_mask.h25270 #define SPI_RESOURCE_RESERVE_CU_15__SGPR__SHIFT … macro
Dgc_11_5_0_sh_mask.h22358 #define SPI_RESOURCE_RESERVE_CU_15__SGPR__SHIFT … macro
Dgc_11_0_0_sh_mask.h26346 #define SPI_RESOURCE_RESERVE_CU_15__SGPR__SHIFT … macro
Dgc_12_0_0_sh_mask.h33484 #define SPI_RESOURCE_RESERVE_CU_15__SGPR__SHIFT … macro
Dgc_11_0_3_sh_mask.h28846 #define SPI_RESOURCE_RESERVE_CU_15__SGPR__SHIFT … macro
Dgc_10_1_0_sh_mask.h20050 #define SPI_RESOURCE_RESERVE_CU_15__SGPR__SHIFT … macro